LF356

ACTIVE

Single, 36-V, 5-MHz, high slew rate (12-V/µs), In to V+, JFET-input operational amplifier

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TL071H ACTIVE Single, 40-V, 5-MHz, 4-mV offset voltage, 20-V/µs, In to V+ op amp with -40°C to 125°C operation Wider temperature range (-40°C to 125°C), lower quiescent current (0.0937 mA), wider voltage range (4.5 V to 40 V), and improved offset voltage drift
TL081H ACTIVE Single, 40-V, 5.25-MHz, 4-mV offset voltage, 20-V/µs, In to V+ op amp with -40°C to 125°C operation Wider supply range (4.5 V to 40 V), higher GBW (5.25 MHz), faster slew rate (20 V/us), lower offset voltage (4 mV), lower power (0.9375 mA)

Product details

Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 36 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 10 Rail-to-rail In to V+ GBW (typ) (MHz) 5 Slew rate (typ) (V/µs) 12 Vos (offset voltage at 25°C) (max) (mV) 10 Iq per channel (typ) (mA) 5 Vn at 1 kHz (typ) (nV√Hz) 12 Rating Catalog Operating temperature range (°C) 0 to 70 Offset drift (typ) (µV/°C) 3 Input bias current (max) (pA) 8000 CMRR (typ) (dB) 100 Iout (typ) (A) 0.025 Architecture FET Input common mode headroom (to negative supply) (typ) (V) 3 Input common mode headroom (to positive supply) (typ) (V) 0.1 Output swing headroom (to negative supply) (typ) (V) 2 Output swing headroom (to positive supply) (typ) (V) -2
Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 36 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 10 Rail-to-rail In to V+ GBW (typ) (MHz) 5 Slew rate (typ) (V/µs) 12 Vos (offset voltage at 25°C) (max) (mV) 10 Iq per channel (typ) (mA) 5 Vn at 1 kHz (typ) (nV√Hz) 12 Rating Catalog Operating temperature range (°C) 0 to 70 Offset drift (typ) (µV/°C) 3 Input bias current (max) (pA) 8000 CMRR (typ) (dB) 100 Iout (typ) (A) 0.025 Architecture FET Input common mode headroom (to negative supply) (typ) (V) 3 Input common mode headroom (to positive supply) (typ) (V) 0.1 Output swing headroom (to negative supply) (typ) (V) 2 Output swing headroom (to positive supply) (typ) (V) -2
PDIP (P) 8 92.5083 mm² 9.81 x 9.43 SOIC (D) 8 29.4 mm² 4.9 x 6
  • Advantages
    • Replace Expensive Hybrid and Module FET
      Op Amps
    • Rugged JFETs Allow Blow-Out Free Handling
      Compared With MOSFET Input Devices
    • Excellent for Low Noise Applications Using
      Either High or Low Source Impedance–Very
      Low 1/f Corner
    • Offset Adjust Does Not Degrade Drift or
      Common-Mode Rejection as in Most
      Monolithic Amplifiers
    • New Output Stage Allows Use of Large
      Capacitive Loads (5,000 pF) Without Stability
      Problems
    • Internal Compensation and Large Differential
      Input Voltage Capability
  • Common Features
    • Low Input Bias Current: 30 pA
    • Low Input Offset Current: 3 pA
    • High Input Impedance: 1012 Ω
    • Low Input Noise Current: 0.01 pA/√Hz
    • High Common-Mode Rejection Ratio: 100 dB
    • Large DC Voltage Gain: 106 dB
  • Uncommon Features
    • Extremely Fast Settling Time to 0.01%:
      • 4 µs for the LFx55 devices
      • 1.5 µs for the LFx56
      • 1.5 µs for the LFx57 (AV = 5)
    • Fast Slew Rate:
      • 5 V/µs for the LFx55
      • 12 V/µs for the LFx56
      • 50 V/µs for the LFx57 (AV = 5)
    • Wide Gain Bandwidth:
      • 2.5 MHz for the LFx55 devices
      • 5 MHz for the LFx56
      • 20 MHz for the LFx57 (AV = 5)
    • Low Input Noise Voltage:
      • 20 nV/√Hz for the LFx55
      • 12 nV/√Hz for the LFx56
      • 12 nV/√Hz for the LFx57 (AV = 5)
  • Advantages
    • Replace Expensive Hybrid and Module FET
      Op Amps
    • Rugged JFETs Allow Blow-Out Free Handling
      Compared With MOSFET Input Devices
    • Excellent for Low Noise Applications Using
      Either High or Low Source Impedance–Very
      Low 1/f Corner
    • Offset Adjust Does Not Degrade Drift or
      Common-Mode Rejection as in Most
      Monolithic Amplifiers
    • New Output Stage Allows Use of Large
      Capacitive Loads (5,000 pF) Without Stability
      Problems
    • Internal Compensation and Large Differential
      Input Voltage Capability
  • Common Features
    • Low Input Bias Current: 30 pA
    • Low Input Offset Current: 3 pA
    • High Input Impedance: 1012 Ω
    • Low Input Noise Current: 0.01 pA/√Hz
    • High Common-Mode Rejection Ratio: 100 dB
    • Large DC Voltage Gain: 106 dB
  • Uncommon Features
    • Extremely Fast Settling Time to 0.01%:
      • 4 µs for the LFx55 devices
      • 1.5 µs for the LFx56
      • 1.5 µs for the LFx57 (AV = 5)
    • Fast Slew Rate:
      • 5 V/µs for the LFx55
      • 12 V/µs for the LFx56
      • 50 V/µs for the LFx57 (AV = 5)
    • Wide Gain Bandwidth:
      • 2.5 MHz for the LFx55 devices
      • 5 MHz for the LFx56
      • 20 MHz for the LFx57 (AV = 5)
    • Low Input Noise Voltage:
      • 20 nV/√Hz for the LFx55
      • 12 nV/√Hz for the LFx56
      • 12 nV/√Hz for the LFx57 (AV = 5)

The LFx5x devices are the first monolithic JFET input operational amplifiers to incorporate well-matched, high-voltage JFETs on the same chip with standard bipolar transistors (BI-FET™ Technology). These amplifiers feature low input bias and offset currents/low offset voltage and offset voltage drift, coupled with offset adjust, which does not degrade drift or common-mode rejection. The devices are also designed for high slew rate, wide bandwidth, extremely fast settling time, low voltage and current noise and a low 1/f noise corner.

The LFx5x devices are the first monolithic JFET input operational amplifiers to incorporate well-matched, high-voltage JFETs on the same chip with standard bipolar transistors (BI-FET™ Technology). These amplifiers feature low input bias and offset currents/low offset voltage and offset voltage drift, coupled with offset adjust, which does not degrade drift or common-mode rejection. The devices are also designed for high slew rate, wide bandwidth, extremely fast settling time, low voltage and current noise and a low 1/f noise corner.

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Technical documentation

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Type Title Date
* Data sheet LFx5x JFET Input Operational Amplifiers datasheet (Rev. D) PDF | HTML 30 Nov 2015
E-book The Signal e-book: A compendium of blog posts on op amp design topics 28 Mar 2017
Application note AN-272 Op Amp Booster Designs (Rev. B) 23 Apr 2013
Application note AN-263 Sine Wave Generation Techniques (Rev. C) 22 Apr 2013
Application note Effect of Heavy Loads on Accuracy and Linearity of Op Amp Circuits (Rev. B) 22 Apr 2013
Application note Data Acq Using ADC0816 & ADC0817 8-Bit ADC w/On-Chip 16 Chan Multiplexr 10 May 2004
Application note AN-293 Control Applications of CMOS DACs 10 May 2004
Application note AN-253 LH0024 and LH0032 High Speed Op Amp Applications 02 May 2004
Application note AN-275 CMOS D/A Converters Match Most Microprocessors 02 May 2004
Application note AN-447 Protection Schemes for BI-FET Amplifiers and Switches 02 May 2004
Application note Get Fast Stable Response From Improved Unity-Gain Followers 02 Oct 2002

Design & development

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Simulation model

LF356 PSPICE Model

SNOM255.ZIP (1 KB) - PSpice Model
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