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SN74LV540A

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8-ch, 2-V to 5.5-V inverters with 3-state outputs

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Data sheet

SN74LV540A

ACTIVE
Data sheet Order now

Product details

Technology family LV-A Supply voltage (min) (V) 2 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 16 IOH (max) (mA) -16 Supply current (max) (µA) 20 Input type Standard CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LV-A Supply voltage (min) (V) 2 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 16 IOH (max) (mA) -16 Supply current (max) (µA) 20 Input type Standard CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
SOIC (DW) 20 131.84 mm² 12.8 x 10.3 SOP (NS) 20 98.28 mm² 12.6 x 7.8 SSOP (DB) 20 56.16 mm² 7.2 x 7.8 TSSOP (PW) 20 41.6 mm² 6.5 x 6.4 TVSOP (DGV) 20 32 mm² 5 x 6.4 VQFN (RGY) 20 15.75 mm² 4.5 x 3.5
  • V CC operation of 2 V to 5.5 V
  • Max t pd of 8.5 ns at 5 V
  • Typical V OLP (Output Ground Bounce) < 0.8 V at V CC = 3.3 V, T A = 25°C
  • Typical V OHV (Output V OH Undershoot) > 2.3 V at V CC = 3.3 V, T A = 25°C
  • Supports Mixed-Mode Voltage operation on all ports
  • I off supports Partial-Power-Down Mode operation
  • Latch-up performance exceeds 250 mA per JESD 17
  • V CC operation of 2 V to 5.5 V
  • Max t pd of 8.5 ns at 5 V
  • Typical V OLP (Output Ground Bounce) < 0.8 V at V CC = 3.3 V, T A = 25°C
  • Typical V OHV (Output V OH Undershoot) > 2.3 V at V CC = 3.3 V, T A = 25°C
  • Supports Mixed-Mode Voltage operation on all ports
  • I off supports Partial-Power-Down Mode operation
  • Latch-up performance exceeds 250 mA per JESD 17

The SN74LV540A device is an octal buffer/driver designed for 2 V to 5.5 V V CC operation.

This device is ideal for driving bus lines or buffer memory address registers. It features inputs and outputs on opposite sides of the package to facilitate printed circuit board layout.

The SN74LV540A device is an octal buffer/driver designed for 2 V to 5.5 V V CC operation.

This device is ideal for driving bus lines or buffer memory address registers. It features inputs and outputs on opposite sides of the package to facilitate printed circuit board layout.
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Technical documentation

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Type Title Date
* Data sheet SN74LV540A Octal Buffers/Drivers with 3-State Outputs datasheet (Rev. J) PDF | HTML 23 Mar 2023

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Evaluation board

14-24-NL-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin non-leaded packages

14-24-NL-LOGIC-EVM is a flexible evaluation module (EVM) designed to support any logic or translation device that has a 14-pin to 24-pin BQA, BQB, RGY, RSV, RJW or RHL package.

User guide: PDF | HTML
Not available on TI.com
Simulation model

SN74LV540A Behavioral SPICE Model

SCLM178.ZIP (7 KB) - PSpice Model
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Simulation model

SN74LV540A IBIS Model

SCEM143.ZIP (18 KB) - IBIS Model
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Package Pins CAD symbols, footprints & 3D models
SOIC (DW) 20 Ultra Librarian
SOP (NS) 20 Ultra Librarian
SSOP (DB) 20 Ultra Librarian
TSSOP (PW) 20 Ultra Librarian
TVSOP (DGV) 20 Ultra Librarian
VQFN (RGY) 20 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

Ordering & quality

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