The TMS320C2xx generation of digital signal processors (DSPs) combines strong performance and great flexibility to meet the needs of signal processing and control applications. The T320C2xLP core CPU that is the basis of all 'C2xx devices has been optimized for high speed, small size, and low-power, making it ideal for demanding applications in many markets. The CPU has an advanced, modified Harvard architecture with six internal buses that permits tremendous parallelism and data throughput. The powerful 'C2xx instruction set makes software development easy. And because the 'C2xx is code-compatible with the TMS320C2x and 'C5x generations, your code investment is preserved. Around this core, 'C2xx-generation devices feature various combinations of on-chip memory and peripherals. The serial ports provide easy communication with external devices such as codecs, A/D converters, and other processors. Other peripherals that facilitate the control of external devices include general-purpose I/O pins, a 20-bit timer, and a wait-state generator.
Because of their strong performance, low cost, and easy-to-use development environment, 'C2xx-generation DSPs are an ideal choice for applications such as smart phones, digital cameras, modems, remote metering, and security systems.
Table 2 provides a comparison of the devices in the 'C2xx generation. It shows the capacity of on-chip RAM and ROM, the number of serial and parallel I/O ports, the execution time of one machine cycle, and the type of package with total pin count.
Core power dissipation. For complete details, see
Calculation of TMS320C2xx Power Dissipation (literature number SPRA088).
The TMS320C2xx generation of digital signal processors (DSPs) combines strong performance and great flexibility to meet the needs of signal processing and control applications. The T320C2xLP core CPU that is the basis of all 'C2xx devices has been optimized for high speed, small size, and low-power, making it ideal for demanding applications in many markets. The CPU has an advanced, modified Harvard architecture with six internal buses that permits tremendous parallelism and data throughput. The powerful 'C2xx instruction set makes software development easy. And because the 'C2xx is code-compatible with the TMS320C2x and 'C5x generations, your code investment is preserved. Around this core, 'C2xx-generation devices feature various combinations of on-chip memory and peripherals. The serial ports provide easy communication with external devices such as codecs, A/D converters, and other processors. Other peripherals that facilitate the control of external devices include general-purpose I/O pins, a 20-bit timer, and a wait-state generator.
Because of their strong performance, low cost, and easy-to-use development environment, 'C2xx-generation DSPs are an ideal choice for applications such as smart phones, digital cameras, modems, remote metering, and security systems.
Table 2 provides a comparison of the devices in the 'C2xx generation. It shows the capacity of on-chip RAM and ROM, the number of serial and parallel I/O ports, the execution time of one machine cycle, and the type of package with total pin count.
Core power dissipation. For complete details, see
Calculation of TMS320C2xx Power Dissipation (literature number SPRA088).