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General-purpose transceivers

CY74FCT16646T

OBSOLETE

16-Bit Bus Transceivers and Registers with 3-State Outputs

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Data sheet
CY74FCT16646T is no longer in production
This product is no longer in production. New designs should consider an alternate product.
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SN74LVC16646A ACTIVE 16-Bit Bus Transceiver And Register With 3-State Outputs Replacement
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SN74ACT245 ACTIVE Octal bus transceivers with TTL-compatible CMOS inputs and 3-state outputs Higher average drive strength (24mA)

CY74FCT16646T

OBSOLETE
Data sheet Order now

Product details

Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 16 IOL (max) (mA) 64 IOH (max) (mA) -32 Input type TTL Output type TTL Features Partial power down (Ioff), Very high speed (tpd 5-10ns) Technology family FCT Rating Catalog Operating temperature range (°C) -40 to 85
Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 16 IOL (max) (mA) 64 IOH (max) (mA) -32 Input type TTL Output type TTL Features Partial power down (Ioff), Very high speed (tpd 5-10ns) Technology family FCT Rating Catalog Operating temperature range (°C) -40 to 85
SSOP (DL) 56 190.647 mm² 18.42 x 10.35
  • Ioff supports partial-power-down mode operation
  • Edge-rate control circuitry for significantly improved noise characteristics
  • Typical output skew < 250 ps
  • ESD > 2000V
  • TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages
  • Industrial temperature range of -40°C to +85°C
  • VCC = 5V ± 10%
  • CY74FCT16646T Features:
    • 64 mA sink current, 32 mA source current
    • Typical V OLP (ground bounce) <1.0V at VCC = 5V, TA = 25°C
  • CY74FCT162646T Features:
    • Balanced 24 mA output drivers
    • Reduced system switching noise
    • Typical VOLP (ground bounce) <0.6V at VCC = 5V, TA = 25°C
  • Ioff supports partial-power-down mode operation
  • Edge-rate control circuitry for significantly improved noise characteristics
  • Typical output skew < 250 ps
  • ESD > 2000V
  • TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages
  • Industrial temperature range of -40°C to +85°C
  • VCC = 5V ± 10%
  • CY74FCT16646T Features:
    • 64 mA sink current, 32 mA source current
    • Typical V OLP (ground bounce) <1.0V at VCC = 5V, TA = 25°C
  • CY74FCT162646T Features:
    • Balanced 24 mA output drivers
    • Reduced system switching noise
    • Typical VOLP (ground bounce) <0.6V at VCC = 5V, TA = 25°C

The CY74FCT16646T and CY74FCT162646T 16-bit transceivers are three-state, D-type registers, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to a HIGH logic level. Output Enable (OE\) and direction pins (DIR) are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or B register, or in both. The select controls can multiplex stored and real-time (transparent mode) data. The direction control determines which bus will receive data when the Output Enable (OE\) is Active LOW. In the isolation mode (Output Enable (OE\) HIGH), A data may be stored in the B register and/or B data may be stored in the A register.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The CY74FCT16646T is ideally suited for driving high-capacitance loads and low-impedance backplanes.

The CY74FCT162646T has 24-mA balanced output drivers with current limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162646T is ideal for driving transmission lines.

The CY74FCT16646T and CY74FCT162646T 16-bit transceivers are three-state, D-type registers, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to a HIGH logic level. Output Enable (OE\) and direction pins (DIR) are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or B register, or in both. The select controls can multiplex stored and real-time (transparent mode) data. The direction control determines which bus will receive data when the Output Enable (OE\) is Active LOW. In the isolation mode (Output Enable (OE\) HIGH), A data may be stored in the B register and/or B data may be stored in the A register.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The CY74FCT16646T is ideally suited for driving high-capacitance loads and low-impedance backplanes.

The CY74FCT162646T has 24-mA balanced output drivers with current limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162646T is ideal for driving transmission lines.
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* Data sheet 16-Bit Registered Transceivers datasheet (Rev. B) 19 Sep 2001

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