Produktdetails

Configuration 2:1 SPDT Number of channels 1 Power supply voltage - single (V) 5, 12, 16, 20, 36, 44 Power supply voltage - dual (V) +/-10, +/-15, +/-18, +/-22, +/-5 Protocols Analog Ron (typ) (Ω) 1.9 CON (typ) (pF) 146 ON-state leakage current (max) (µA) 0.07 Supply current (typ) (µA) 30 Bandwidth (MHz) 38 Operating temperature range (°C) -40 to 125 Features 1.8-V compatible control inputs, Break-before-make Input/output continuous current (max) (mA) 210 TI functional safety category Functional Safety-Capable Rating Automotive
Configuration 2:1 SPDT Number of channels 1 Power supply voltage - single (V) 5, 12, 16, 20, 36, 44 Power supply voltage - dual (V) +/-10, +/-15, +/-18, +/-22, +/-5 Protocols Analog Ron (typ) (Ω) 1.9 CON (typ) (pF) 146 ON-state leakage current (max) (µA) 0.07 Supply current (typ) (µA) 30 Bandwidth (MHz) 38 Operating temperature range (°C) -40 to 125 Features 1.8-V compatible control inputs, Break-before-make Input/output continuous current (max) (mA) 210 TI functional safety category Functional Safety-Capable Rating Automotive
VSSOP (DGK) 8 14.7 mm² 3 x 4.9
  • AEC-Q100 qualified for automotive applications
    • Device temperature grade 1: –40°C to 125°C ambient operating temperature
  • Functional safety-capable
  • Latch-up immune
  • Dual supply range: ±4.5V to ±22V
  • Single supply range: 4.5V to 44V
  • Low on-resistance: 2.1Ω
  • Low charge injection: −10pC
  • High current support: 330mA (maximum)
  • 1.8V logic compatible
  • Fail-safe logic
  • Rail-to-rail operation
  • Bidirectional signal path
  • Break-before-make switching
  • AEC-Q100 qualified for automotive applications
    • Device temperature grade 1: –40°C to 125°C ambient operating temperature
  • Functional safety-capable
  • Latch-up immune
  • Dual supply range: ±4.5V to ±22V
  • Single supply range: 4.5V to 44V
  • Low on-resistance: 2.1Ω
  • Low charge injection: −10pC
  • High current support: 330mA (maximum)
  • 1.8V logic compatible
  • Fail-safe logic
  • Rail-to-rail operation
  • Bidirectional signal path
  • Break-before-make switching

The TMUX7219-Q1 is a complementary metal-oxide semiconductor (CMOS) switch with latch-up immunity in a single channel, 2:1 (SPDT) configuration. The device works with a single supply (4.5 V to 44 V), dual supplies (±4.5V to ±22V), or asymmetric supplies (such as VDD = 12V, VSS = –5V). The TMUX7219-Q1 supports bidirectional analog and digital signals on the source (Sx) and drain (D) pins ranging from VSS to VDD.

The TMUX7219-Q1 can be enabled or disabled by controlling the EN pin. When disabled, both signal path switches are off. When enabled, the SEL pin can be used to turn on signal path 1 (S1 to D) or signal path 2 (S2 to D). All logic control inputs support logic levels from 1.8V to VDD, ensuring both TTL and CMOS logic compatibility when operating in the valid supply voltage range. Fail-Safe Logic circuitry allows voltages on the control pins to be applied before the supply pin, protecting the device from potential damage.

The TMUX72xx family provides latch-up immunity, preventing undesirable high current events between parasitic structures within the device typically caused by overvoltage events. A latch-up condition typically continues until the power supply rails are turned off and can lead to device failure. The latch-up immunity feature allows the TMUX72xx family of switches and multiplexers to be used in harsh environments.

The TMUX7219-Q1 is a complementary metal-oxide semiconductor (CMOS) switch with latch-up immunity in a single channel, 2:1 (SPDT) configuration. The device works with a single supply (4.5 V to 44 V), dual supplies (±4.5V to ±22V), or asymmetric supplies (such as VDD = 12V, VSS = –5V). The TMUX7219-Q1 supports bidirectional analog and digital signals on the source (Sx) and drain (D) pins ranging from VSS to VDD.

The TMUX7219-Q1 can be enabled or disabled by controlling the EN pin. When disabled, both signal path switches are off. When enabled, the SEL pin can be used to turn on signal path 1 (S1 to D) or signal path 2 (S2 to D). All logic control inputs support logic levels from 1.8V to VDD, ensuring both TTL and CMOS logic compatibility when operating in the valid supply voltage range. Fail-Safe Logic circuitry allows voltages on the control pins to be applied before the supply pin, protecting the device from potential damage.

The TMUX72xx family provides latch-up immunity, preventing undesirable high current events between parasitic structures within the device typically caused by overvoltage events. A latch-up condition typically continues until the power supply rails are turned off and can lead to device failure. The latch-up immunity feature allows the TMUX72xx family of switches and multiplexers to be used in harsh environments.

Herunterladen Video mit Transkript ansehen Video

Technische Dokumentation

star =Von TI ausgewählte Top-Empfehlungen für dieses Produkt
Keine Ergebnisse gefunden. Bitte geben Sie einen anderen Begriff ein und versuchen Sie es erneut.
Alle anzeigen 4
Typ Titel Datum
* Data sheet TMUX7219-Q1 44V , Latch-Up Immune, 2:1 (SPDT) Precision Switch with 1.8V Logic datasheet (Rev. B) PDF | HTML 10 Jul 2024
Application note How to Handle High Voltage Common Mode Applications using Multiplexers PDF | HTML 03 Okt 2022
Application note Using Latch Up Immune Multiplexers to Help Improve System Reliability (Rev. A) 20 Sep 2021
Functional safety information TMUX7219-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA PDF | HTML 14 Jun 2021

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Schnittstellenadapter

LEADED-ADAPTER1 — Oberflächenmontierbarer DIP-Header-Adapter zur schnellen Prüfung der 5-, 8-, 10-, 16- und 24-poligen

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

Benutzerhandbuch: PDF
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
VSSOP (DGK) 8 Ultra Librarian

Bestellen & Qualität

Beinhaltete Information:
  • RoHS
  • REACH
  • Bausteinkennzeichnung
  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort

Empfohlene Produkte können Parameter, Evaluierungsmodule oder Referenzdesigns zu diesem TI-Produkt beinhalten.

Support und Schulungen

TI E2E™-Foren mit technischem Support von TI-Ingenieuren

Inhalte werden ohne Gewähr von TI und der Community bereitgestellt. Sie stellen keine Spezifikationen von TI dar. Siehe Nutzungsbedingungen.

Bei Fragen zu den Themen Qualität, Gehäuse oder Bestellung von TI-Produkten siehe TI-Support. ​​​​​​​​​​​​​​

Videos