Inicio Convertidores de datos Convertidores de datos integrados y de funciones especiales AFE de uso médico AFE de tomografía computarizada (TC)

DDC112

ACTIVO

Convertidor analógico a digital doble, entrada de corriente, 20 bits

Detalles del producto

Number of input channels 2 Resolution (Bits) 20 Features Computed Tomography (CT) Operating temperature range (°C) -40 to 85 Interface type Serial Rating Catalog
Number of input channels 2 Resolution (Bits) 20 Features Computed Tomography (CT) Operating temperature range (°C) -40 to 85 Interface type Serial Rating Catalog
SOIC (DW) 28 184.37 mm² 17.9 x 10.3 TQFP (PJT) 32 81 mm² 9 x 9
  • MONOLITHIC CHARGE MEASUREMENT ADC
  • DIGITAL FILTER NOISE REDUCTION:
       3.2ppm, rms
  • INTEGRAL LINEARITY:
       ±0.005% Reading ±0.5ppm FSR
  • HIGH PRECISION,TRUE INTEGRATING FUNCTION
  • PROGRAMMABLE FULL SCALE
  • SINGLE SUPPLY
  • CASCADABLE OUTPUT
  • APPLICATIONS
    • DIRECT PHOTOSENSOR DIGITIZATION
    • CT SCANNER DAS
    • INFRARED PYROMETER
    • PRECISION PROCESS CONTROL
    • LIQUID/GAS CHROMATOGRAPHY
    • BLOOD ANALYSIS

Protected by US Patent #5841310
All trademarks are the property of their respective owners.

  • MONOLITHIC CHARGE MEASUREMENT ADC
  • DIGITAL FILTER NOISE REDUCTION:
       3.2ppm, rms
  • INTEGRAL LINEARITY:
       ±0.005% Reading ±0.5ppm FSR
  • HIGH PRECISION,TRUE INTEGRATING FUNCTION
  • PROGRAMMABLE FULL SCALE
  • SINGLE SUPPLY
  • CASCADABLE OUTPUT
  • APPLICATIONS
    • DIRECT PHOTOSENSOR DIGITIZATION
    • CT SCANNER DAS
    • INFRARED PYROMETER
    • PRECISION PROCESS CONTROL
    • LIQUID/GAS CHROMATOGRAPHY
    • BLOOD ANALYSIS

Protected by US Patent #5841310
All trademarks are the property of their respective owners.

The DDC112 is a dual input, wide dynamic range, charge-digitizing analog-to-digital (A/D) converter with 20-bit resolution. Low-level current output devices, such as photosensors, can be directly connected to its inputs. Charge integration is continuous as each input uses two integrators; while one is being digitized, the other is integrating.

For each of its two inputs, the DDC112 combines current-to-voltage conversion, continuous integration, programmable full-scale range, A/D conversion, and digital filtering to achieve a precision, wide dynamic range digital result. In addition to the internal programmable full-scale ranges, external integrating capacitors allow an additional user-settable full-scale range of up to 1000pC.

To provide single-supply operation, the internal A/D converter utilizes a differential input, with the positive input tied to VREF. When the integration capacitor is reset at the beginning of each integration cycle, the capacitor charges to VREF. This charge is removed in proportion to the input current. At the end of the integration cycle, the remaining voltage is compared to VREF.

The high-speed serial shift register which holds the result of the last conversion can be configured to allow multiple DDC112 units to be cascaded, minimizing interconnections. The DDC112 is available in a SO-28 or TQFP-32 package and is offered in two performance grades.

The DDC112 is a dual input, wide dynamic range, charge-digitizing analog-to-digital (A/D) converter with 20-bit resolution. Low-level current output devices, such as photosensors, can be directly connected to its inputs. Charge integration is continuous as each input uses two integrators; while one is being digitized, the other is integrating.

For each of its two inputs, the DDC112 combines current-to-voltage conversion, continuous integration, programmable full-scale range, A/D conversion, and digital filtering to achieve a precision, wide dynamic range digital result. In addition to the internal programmable full-scale ranges, external integrating capacitors allow an additional user-settable full-scale range of up to 1000pC.

To provide single-supply operation, the internal A/D converter utilizes a differential input, with the positive input tied to VREF. When the integration capacitor is reset at the beginning of each integration cycle, the capacitor charges to VREF. This charge is removed in proportion to the input current. At the end of the integration cycle, the remaining voltage is compared to VREF.

The high-speed serial shift register which holds the result of the last conversion can be configured to allow multiple DDC112 units to be cascaded, minimizing interconnections. The DDC112 is available in a SO-28 or TQFP-32 package and is offered in two performance grades.

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Documentación técnica

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Tipo Título Fecha
* Data sheet DDC112: Dual Current Input 20-Bit Analog-To-Digital Converter datasheet (Rev. B) 06 oct 2004
Technical article Designing signal chains for portable diagnostics PDF | HTML 18 may 2022
Analog Design Journal Selecting a multichannel ultra-low-current measurement IC PDF | HTML 18 mar 2022
Technical article Helping physicians achieve faster, more accurate patient diagnoses with molecular PDF | HTML 20 may 2020
EVM User's guide DDC11xEVM-PDK User's Guide (Rev. A) 09 jul 2010
More literature DDC11xEVM Readme Page Thank You Letter 07 nov 2007
Application note Creating a Bipolar Input Range for the DDC112 27 sep 2000
User guide DEM-DDC112U-C: Demonstration Fixture for the DDC112 27 sep 2000
Application note Multi-DDC112 DUT Board for the DDC112 Evaluation Fixture 27 sep 2000
Application note Retrieving Data from the DDC112 27 sep 2000
Application note The DDC112\'s Test Mode 27 sep 2000
Application note Understanding The DDC112\'S Continuous and Non-Continuous Modes 27 sep 2000
Application note Using External Integration Capacitors on the DDC112 27 sep 2000

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

DDC11XEVM-PDK — Kit de demostración de rendimiento DDC11xEVM-PDK

The DDC11xEVM-PDK provides an easy-to-use platform for evaluating the DDC112 or DDC114 charge digitizing A/D converters. A PC interface board (DDCMB) and daughter boards for the DDC112 or DDC114 are included along with software that makes analysis and testing of these devices manageable.

Guía del usuario: PDF
Archivo Gerber

DDC112EVM Gerber

SBAC114.ZIP (240 KB)
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SOIC (DW) 28 Ultra Librarian
TQFP (PJT) 32 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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