Herramienta de diseño
DS250DF410
Retemporizador multifrecuencia de 4 canales y 25 Gbps
Hoja de datos
DS250DF410
- Quad-channel multi-rate retimer with integrated signal conditioning
- All channels lock independently from 20.2752 to 25.8 Gbps (including sub-rates such as 10.3125 Gbps, 12.5 Gbps, and more)
- Ultra-low latency: <500 ps typical for 25.78125-Gbps data rate
- Single power supply, no low-jitter reference clock required, and minimal supply decoupling to reduce board routing complexity and BOM cost
- Integrated 2×2 cross point
- Adaptive continuous time linear equalizer (CTLE)
- Adaptive decision feedback equalizer (DFE)
- Low-jitter transmitter with 3-Tap FIR filter
- Combined equalization supporting 35+ dB channel loss at 12.9 GHz
- Adjustable transmit amplitude: 205 mVppd to 1225 mVppd (Typical)
- On-chip eye opening monitor (EOM), PRBS pattern checker/generator
- Supports JTAG/AC-JTAG boundary scan
- Small 6-mm × 6-mm BGA package with easy flow-through routing
The DS250DF410 is a four-channel multi-rate retimer with integrated signal conditioning. It is used to extend the reach and robustness of long, lossy, crosstalk-impaired high-speed serial links while achieving a bit error rate (BER) of 10-15 or less.
Each channel of the DS250DF410 independently locks to serial data rates in a continuous range from 20.2752 Gbps to 25.8 Gbps or to any supported sub-rate (÷2 and ÷4), including key data rates such as 10.3125 Gbps and 12.5 Gbps, which allows the DS250DF410 to support individual lane Forward Error Correction (FEC) pass-through.
The DS250DF410 has a single power supply and minimal need for external components. These features reduce PCB routing complexity and BOM cost.
The advanced equalization features of the DS250DF410 include a low-jitter 3-tap transmit finite impulse response (FIR) filter, an adaptive continuous-time linear equalizer (CTLE), and an adaptive decision feedback equalizer (DFE). This enables reach extension for lossy interconnect and backplanes with multiple connectors and crosstalk. The integrated CDR function is ideal for front-port optical module applications to reset the jitter budget and retime the high-speed serial data. The DS250DF410 implements 2x2 cross-point on each channel pair, providing the host with lane crossing, fanout, and multiplexing options.
The DS250DF410 can be configured either through the SMBus or through an external EEPROM. Up to 16 devices can share a single EEPROM using Common Channel format. A non-disruptive on-chip eye monitor and a PRBS generator/checker allow for in-system diagnostics.
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Documentación técnica
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Ver todo 7 | Tipo | Título | Fecha | ||
|---|---|---|---|---|
| * | Data sheet | DS250DF410 25 Gbps Multi-Rate 4-Channel Retimer datasheet (Rev. D) | PDF | HTML | 24 oct 2019 |
| Application note | Implementing Pin Compatible Ethernet Redrivers and Retimers | PDF | HTML | 28 oct 2024 | |
| Application note | Optimal Implementation of 25G-28G Ethernet Retimers versus Redrivers (Rev. B) | PDF | HTML | 01 may 2023 | |
| EVM User's guide | DS250DF410EVM User's Guide (Rev. A) | 03 sep 2019 | ||
| More literature | Advanced Signal Conditioning Made Easy and Efficient | 12 ene 2017 | ||
| Analog Design Journal | Green box testing: A method for optimizing high-speed serial links | 21 jul 2016 | ||
| Application note | Understanding EEPROM Programming for 25G and 28G Repeaters and Retimers | 13 ene 2016 |
Diseño y desarrollo
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
Placa de evaluación
DS250DF410EVM — Módulo de evaluación de retemporizador de 4 canales, multifrecuencia y 25 Gbps DS250DF410
The DS250DF410EVM allows for easy evaluation of the 25 Gbps retimer DS250DF410. Users are required to supply power and high speed traffic to the EVM via Huber+Suhner 1x8 MXP connectors. Huber+Suhner cables are not included.
Through the onboard USB2ANY connection and EVM software, users can evaluate (...)
Guía del usuario: PDF
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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Guía del usuario: PDF
| Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
|---|---|---|
| FCCSP (ABM) | 101 | Ultra Librarian |
Pedidos y calidad
Información incluida:
- RoHS
- REACH
- Marcado del dispositivo
- Acabado de plomo/material de la bola
- Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
- Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
- Contenido del material
- Resumen de calificaciones
- Monitoreo continuo de confiabilidad
Información incluida:
- Lugar de fabricación
- Lugar de ensamblaje
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Soporte y capacitación
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