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Serializadores-deserializadores FPD-Link

DS90UH948-Q1

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Deserializador FPD-Link III dual OLDI de 1080 p con HDCP

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DS90UH948-Q1

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Detalles del producto

Applications In-vehicle Infotainment (IVI) Input compatibility FPD-Link III LVDS Function Deserializer Output compatibility LVDS Color depth (bpp) 24 Features HDCP Signal conditioning Adaptive Equalizer EMI reduction LVDS Diagnostics BIST Rating Automotive Operating temperature range (°C) -40 to 105 TI functional safety category Functional Safety-Capable
Applications In-vehicle Infotainment (IVI) Input compatibility FPD-Link III LVDS Function Deserializer Output compatibility LVDS Color depth (bpp) 24 Features HDCP Signal conditioning Adaptive Equalizer EMI reduction LVDS Diagnostics BIST Rating Automotive Operating temperature range (°C) -40 to 105 TI functional safety category Functional Safety-Capable
WQFN (NKD) 64 81 mm² 9 x 9
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results:
    • Device temperature grade 2: –40°C to +105°C ambient operating temperature
  • Supports pixel clock frequency up to 192 MHz for up to 2K (2048x1080) resolutions with 24-bit color depth
  • 1-Lane or 2-lane FPD-Link III interface with de-skew capability
  • Single or dual OpenLDI (LVDS) transmitter
    • Single channel: up to 96-MHz pixel clock
    • Dual channel: up to 192-MHz pixel clock
    • Configurable 18-Bit RGB or 24-bit RGB
  • Integrated HDCP cipher engine with on-chip key storage
  • Supports HDCP repeater applications
  • Functional Safety-Capable
    • Documentation available to aid ISO 26262 system design
  • Four high-speed GPIOs (up to 2 Mbps each)
  • Adaptive receive equalization
    • Compensates for channel insertion loss of up to –15.5 dB at 1.48 GHz and -9 dB at 1.68 GHz
    • Provides automatic temperature and cable aging compensation
  • SPI control interfaces up to 3.3 Mbps
  • I2C (Controller/Target) With 1-Mbps fast-mode plus
  • Image enhancement (white balance and dithering)
  • Supports 7.1 multiple I2S (4 data) channels
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results:
    • Device temperature grade 2: –40°C to +105°C ambient operating temperature
  • Supports pixel clock frequency up to 192 MHz for up to 2K (2048x1080) resolutions with 24-bit color depth
  • 1-Lane or 2-lane FPD-Link III interface with de-skew capability
  • Single or dual OpenLDI (LVDS) transmitter
    • Single channel: up to 96-MHz pixel clock
    • Dual channel: up to 192-MHz pixel clock
    • Configurable 18-Bit RGB or 24-bit RGB
  • Integrated HDCP cipher engine with on-chip key storage
  • Supports HDCP repeater applications
  • Functional Safety-Capable
    • Documentation available to aid ISO 26262 system design
  • Four high-speed GPIOs (up to 2 Mbps each)
  • Adaptive receive equalization
    • Compensates for channel insertion loss of up to –15.5 dB at 1.48 GHz and -9 dB at 1.68 GHz
    • Provides automatic temperature and cable aging compensation
  • SPI control interfaces up to 3.3 Mbps
  • I2C (Controller/Target) With 1-Mbps fast-mode plus
  • Image enhancement (white balance and dithering)
  • Supports 7.1 multiple I2S (4 data) channels

The DS90UH948-Q1 is a FPD-Link III deserializer which, in conjunction with the DS90UH949A/949/947-Q1 serializers, converts 1-lane or 2-lane FPD-Link III streams into a FPD-Link (OpenLDI) interface. The deserializer is capable of operating over cost-effective 50-Ω single-ended coaxial or 100-Ω differential shielded twisted-pair (STP) cables. It recovers the data from one or two FPD-Link III serial streams and translates it into dual pixel FPD-Link (8 LVDS data lanes + clock) supporting video resolutions up to 2K (2048x1080) with 24-bit color depth. This provides a bridge between HDMI enabled sources such as GPUs to connect to existing LVDS displays or application processors.

The FPD-Link III interface supports video and audio data transmission and full duplex control, including I2C and SPI communication, over the same differential link. Consolidation of video data and control over two differential pairs decreases the interconnect size and weight and simplifies system design. EMI is minimized by the use of low voltage differential signaling, data scrambling, and randomization. In backward compatible mode, the device supports up to WXGA and 720p resolutions with 24-bit color depth over a single differential link.

The device automatically senses the FPD-Link III channels and supplies a clock alignment and de-skew functionality without the need for any special training patterns. This ensures skew phase tolerance from mismatches in interconnect wires such as PCB trace routing, cable pair-to-pair length differences, and connector imbalances.

The DS90UH948-Q1 is a FPD-Link III deserializer which, in conjunction with the DS90UH949A/949/947-Q1 serializers, converts 1-lane or 2-lane FPD-Link III streams into a FPD-Link (OpenLDI) interface. The deserializer is capable of operating over cost-effective 50-Ω single-ended coaxial or 100-Ω differential shielded twisted-pair (STP) cables. It recovers the data from one or two FPD-Link III serial streams and translates it into dual pixel FPD-Link (8 LVDS data lanes + clock) supporting video resolutions up to 2K (2048x1080) with 24-bit color depth. This provides a bridge between HDMI enabled sources such as GPUs to connect to existing LVDS displays or application processors.

The FPD-Link III interface supports video and audio data transmission and full duplex control, including I2C and SPI communication, over the same differential link. Consolidation of video data and control over two differential pairs decreases the interconnect size and weight and simplifies system design. EMI is minimized by the use of low voltage differential signaling, data scrambling, and randomization. In backward compatible mode, the device supports up to WXGA and 720p resolutions with 24-bit color depth over a single differential link.

The device automatically senses the FPD-Link III channels and supplies a clock alignment and de-skew functionality without the need for any special training patterns. This ensures skew phase tolerance from mismatches in interconnect wires such as PCB trace routing, cable pair-to-pair length differences, and connector imbalances.
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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Fecha
* Data sheet DS90UH948-Q1 Automotive 2K FPD-Link III to OpenLDI Deserializer With HDCP datasheet (Rev. D) PDF | HTML 18 feb 2022
User guide FPD-Link Margin Analysis Program (MAP) user's guide 14 ene 2019

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

DS90UH948-Q1EVM — Módulo de evaluación DS90UH948-Q1EVM de deserializador FPD-Link III

The Texas Instruments DS90UH948-Q1EVM evaluation module (EVM) converts FPD-Link III to OpenLDI.

This kit will demonstrate the functionality and operation of the DS90UH948-Q1. The DS90UH948-Q1 supports HDCP content protection. The DS90UH948-Q1 is a FPD-Link III Deserializer which, in conjunction with (...)

Guía del usuario: PDF
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Software de aplicación y estructura

ALP — Analog LaunchPad Framework Utility

Analog LaunchPad (ALP) software is an interactive graphical user interface (GUI) software platform to evaluate TI FPD-Link™ serializers and deserializers (SerDes). ALP software enables device- and system-level evaluation with powerful built-in features, including:

  • Local and remote device access
  • (...)
Productos y hardware compatibles

Productos y hardware compatibles
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Soporte de software

ALP-PROFILE-UPDATE — Analog LaunchPad Profile Update Software

Analog LaunchPad (ALP) software is an interactive graphical user interface (GUI) software platform to evaluate TI FPD-Link™ serializers and deserializers (SerDes). ALP software enables device- and system-level evaluation with powerful built-in features, including:

  • Local and remote device access
  • (...)
Productos y hardware compatibles

Productos y hardware compatibles
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Modelo de simulación

DS90UH948-Q1 IBIS Model

SNLM183.ZIP (73 KB) - IBIS Model
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Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® para TI es un entorno de diseño y simulación que ayuda a evaluar la funcionalidad de los circuitos analógicos. Esta completa suite de diseño y simulación utiliza un motor de análisis analógico de Cadence®. Disponible sin ningún costo, PSpice para TI incluye una de las bibliotecas de modelos (...)
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Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
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Encapsulado Pines Símbolos CAD, huellas y modelos 3D
WQFN (NKD) 64 Ultra Librarian
Se aplican los Términos y condiciones estándar de TI para los elementos de evaluación.

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL)/reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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Soporte y capacitación

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