Inicio Interfaz Circuitos integrados de interfaz digital serie (SDI)

LMH0346

ACTIVO

Reclocker HD/SD SDI de 3G con salidas diferenciales dobles

Detalles del producto

Function Reclocker Supply voltage (V) 3.3 Power consumption (mW) 365 Data rate (max) (Mbps) 2970 Control interface Pin, SMBus Operating temperature range (°C) -40 to 85
Function Reclocker Supply voltage (V) 3.3 Power consumption (mW) 365 Data rate (max) (Mbps) 2970 Control interface Pin, SMBus Operating temperature range (°C) -40 to 85
HTSSOP (PWP) 20 41.6 mm² 6.5 x 6.4 WQFN (NHZ) 24 20 mm² 5 x 4
  • Supports SMPTE 424M, SMPTE 292M, and SMPTE 259M (C) Serial Digital Video Standards
  • Supports 270 Mbps, 1.483 Gbps, 1.485 Gbps, 2.967 Gbps, and 2.97 Gbps Serial Data Rate Operation
  • Supports DVB-ASI at 270 Mbps
  • Single 3.3V Supply Operation
  • 370 mW Typical Power Consumption
  • Two Differential, Reclocked Outputs
  • Choice of Second Reclocked Output or Low-Jitter, Differential, Data-Rate Clock Output
  • Single 27 MHz External Crystal or Reference Clock Input
  • Manual or Automatic Rate Select Input
  • SD/HD Operating Rate Indicator Output
  • Lock Detect Indicator Output
  • Output Mute Function for Data and Clock
  • Auto/Manual Reclocker Bypass
  • Differential LVPECL Compatible Serial Data Inputs and Outputs
  • LVCMOS Control Inputs and Indicator Outputs
  • 20-Pin HTSSOP or 24-Pin WQFN Package
  • Industrial Temperature Range: -40°C to +85°C
  • Footprint Compatible With the LMH0046 and LMH0026 (HTSSOP Package)

All trademarks are the property of their respective owners.

  • Supports SMPTE 424M, SMPTE 292M, and SMPTE 259M (C) Serial Digital Video Standards
  • Supports 270 Mbps, 1.483 Gbps, 1.485 Gbps, 2.967 Gbps, and 2.97 Gbps Serial Data Rate Operation
  • Supports DVB-ASI at 270 Mbps
  • Single 3.3V Supply Operation
  • 370 mW Typical Power Consumption
  • Two Differential, Reclocked Outputs
  • Choice of Second Reclocked Output or Low-Jitter, Differential, Data-Rate Clock Output
  • Single 27 MHz External Crystal or Reference Clock Input
  • Manual or Automatic Rate Select Input
  • SD/HD Operating Rate Indicator Output
  • Lock Detect Indicator Output
  • Output Mute Function for Data and Clock
  • Auto/Manual Reclocker Bypass
  • Differential LVPECL Compatible Serial Data Inputs and Outputs
  • LVCMOS Control Inputs and Indicator Outputs
  • 20-Pin HTSSOP or 24-Pin WQFN Package
  • Industrial Temperature Range: -40°C to +85°C
  • Footprint Compatible With the LMH0046 and LMH0026 (HTSSOP Package)

All trademarks are the property of their respective owners.

The LMH0346 3 Gbps HD/SD SDI Reclocker retimes serial digital video data conforming to the SMPTE 424M, SMPTE 292M, and SMPTE 259M (C) standards. The LMH0346 operates at serial data rates of 270 Mbps, 1.483 Gbps, 1.485 Gbps, 2.967 Gbps, and 2.97 Gbps. The LMH0346 supports DVB-ASI operation at 270 Mbps.

The LMH0346 automatically detects the incoming data rate and adjusts itself to retime the incoming data to suppress accumulated jitter. The LMH0346 recovers the serial data-rate clock and optionally provides it as an output. The LMH0346 has two differential serial data outputs; the second output may be selected as a low-jitter, data-rate clock output. Controls and indicators are: serial clock or second serial data output select, manual rate select input, SD/HD rate indicator output, lock detect output, auto/manual data bypass and output mute. The serial data inputs, outputs, and serial clock outputs are differential LVPECL compatible. The CML serial data and serial clock outputs are suitable for driving 100Ω differentially terminated networks. The control logic inputs and outputs are LVCMOS compatible.

The LMH0346 is powered from a single 3.3V supply. Power dissipation is typically 370 mW.

The device is available in two space-saving packages: a 6.5 X 4.4 mm 20-pin HTSSOP and an even more space–efficient 5 X 4 mm 24-pin WQFN package.

The LMH0346 3 Gbps HD/SD SDI Reclocker retimes serial digital video data conforming to the SMPTE 424M, SMPTE 292M, and SMPTE 259M (C) standards. The LMH0346 operates at serial data rates of 270 Mbps, 1.483 Gbps, 1.485 Gbps, 2.967 Gbps, and 2.97 Gbps. The LMH0346 supports DVB-ASI operation at 270 Mbps.

The LMH0346 automatically detects the incoming data rate and adjusts itself to retime the incoming data to suppress accumulated jitter. The LMH0346 recovers the serial data-rate clock and optionally provides it as an output. The LMH0346 has two differential serial data outputs; the second output may be selected as a low-jitter, data-rate clock output. Controls and indicators are: serial clock or second serial data output select, manual rate select input, SD/HD rate indicator output, lock detect output, auto/manual data bypass and output mute. The serial data inputs, outputs, and serial clock outputs are differential LVPECL compatible. The CML serial data and serial clock outputs are suitable for driving 100Ω differentially terminated networks. The control logic inputs and outputs are LVCMOS compatible.

The LMH0346 is powered from a single 3.3V supply. Power dissipation is typically 370 mW.

The device is available in two space-saving packages: a 6.5 X 4.4 mm 20-pin HTSSOP and an even more space–efficient 5 X 4 mm 24-pin WQFN package.

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Documentación técnica

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Tipo Título Fecha
* Data sheet LMH0346 3 Gbps HD/SD SDI Reclocker with Dual Differential Outputs datasheet (Rev. J) 15 abr 2013
Selection guide Broadcast and Professional Video Interface Solutions (Rev. E) 05 abr 2017
Application note AN-1943 Understanding Serial Digital Video Bit Rates (Rev. A) 26 abr 2013
Application note AN-1977 LMH0346 Customization with SMBus (Rev. A) 26 abr 2013
Application note AN-2004 Replacing the CLC016 Reclocker with the LMH0026 (Rev. A) 26 abr 2013
Application note AN-2145 Power Considerations for SDI Products (Rev. B) 26 abr 2013
Application note AN-2146 Power Design for SDI and Other Noise-Sensitive Devices (Rev. A) 26 abr 2013
User guide SD3GDAEVK User Guide 05 abr 2013
User guide 3 Gbps HD SD SDI Reclocker with Dual Differential Outputs Eval Bd User Guide 26 ene 2012
Application note High-Speed Board Layout Challenges in FPGA/SDI Sub-Systems 12 nov 2009
Application note Reference Clock Loop Through Application 16 ene 2009
Design guide Broadcast Video Owner's Manual 17 nov 2006

Diseño y desarrollo

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Esquema

SD346EVK User Files

SNLC007.ZIP (891 KB)
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
HTSSOP (PWP) 20 Ultra Librarian
WQFN (NHZ) 24 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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