SN74LVC1GX04

Name: SN74LVC1GX04
Brand: TI
SKU: SN74LVC1GX04
Price: 0.41 USD

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Inversor único de 1.65 V a 5.5 V

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document-pdfAcrobat SN74LVC1GX04 Crystal Oscillator Driver datasheet (Rev. D) (Inglés) PDF | HTML

SN74LVC1GX04

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Detalles del producto

Technology family

LVC

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

5.5

Number of channels

1

IOL (max) (mA)

32

IOH (max) (mA)

-32

Supply current (max) (µA)

10

Input type

Standard CMOS

Output type

Push-Pull

Features

Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 125

Technology family

LVC

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

5.5

Number of channels

1

IOL (max) (mA)

32

IOH (max) (mA)

-32

Supply current (max) (µA)

10

Input type

Standard CMOS

Output type

Push-Pull

Features

Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 125

SOT-23 (DBV)

6

8.12 mm² 2.9 x 2.8

SOT-5X3 (DRL)

6

2.56 mm² 1.6 x 1.6

SOT-SC70 (DCK)

6

4.2 mm² 2 x 2.1

Available in Texas Instruments NanoStar and NanoFree Packages
Supports 5-V V_CC Operation
Inputs Accept Voltages to 5.5 V
One Unbuffered Inverter (SN74LVC1GU04) and One Buffered Inverter (SN74LVC1G04)
Suitable for Commonly Used Clock Frequencies:
- 15 kHz, 3.58 MHz, 4.43 MHz, 13 MHz,
  25 MHz, 26 MHz, 27 MHz, 28 MHz
Maximum t_pd of 2.4 ns at 3.3 V
Low Power Consumption, 10-μA Maximum I_CC
±24-mA Output Drive at 3.3 V
I_off Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human Body Model (A114-A)
- 1000-V Charged-Device Model (C101)

Available in Texas Instruments NanoStar and NanoFree Packages
Supports 5-V V_CC Operation
Inputs Accept Voltages to 5.5 V
One Unbuffered Inverter (SN74LVC1GU04) and One Buffered Inverter (SN74LVC1G04)
Suitable for Commonly Used Clock Frequencies:
- 15 kHz, 3.58 MHz, 4.43 MHz, 13 MHz,
  25 MHz, 26 MHz, 27 MHz, 28 MHz
Maximum t_pd of 2.4 ns at 3.3 V
Low Power Consumption, 10-μA Maximum I_CC
±24-mA Output Drive at 3.3 V
I_off Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human Body Model (A114-A)
- 1000-V Charged-Device Model (C101)

The SN74LVC1GX04 device is designed for 1.65-V to 5.5-V V_CC operation. This device incorporates the SN74LVC1GU04 (inverter with unbuffered output) and the SN74LVC1G04 (inverter) functions into a single device. The LVC1GX04 is optimized for use in crystal oscillator applications.

X1 and X2 can be connected to a crystal or resonator in oscillator applications. The device provides an additional buffered inverter (Y) for signal conditioning (see ). The additional buffered inverter improves the signal quality of the crystal oscillator output by making it rail to rail.

NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using I_off(Y output only). The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

For all available packages, see the orderable addendum at the end of the data sheet.

The SN74LVC1GX04 device is designed for 1.65-V to 5.5-V V_CC operation. This device incorporates the SN74LVC1GU04 (inverter with unbuffered output) and the SN74LVC1G04 (inverter) functions into a single device. The LVC1GX04 is optimized for use in crystal oscillator applications.

X1 and X2 can be connected to a crystal or resonator in oscillator applications. The device provides an additional buffered inverter (Y) for signal conditioning (see ). The additional buffered inverter improves the signal quality of the crystal oscillator output by making it rail to rail.

NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using I_off(Y output only). The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

For all available packages, see the orderable addendum at the end of the data sheet.

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Documentación técnica

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	Tipo	Título		Fecha
*	Data sheet	SN74LVC1GX04 Crystal Oscillator Driver datasheet (Rev. D)	PDF \| HTML	29 oct 2015
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)		26 jul 2021
	Selection guide	Little Logic Guide 2018 (Rev. G)		06 jul 2018
	Selection guide	Logic Guide (Rev. AB)		12 jun 2017
	Application note	How to Select Little Logic (Rev. A)		26 jul 2016
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)		02 dic 2015
	User guide	LOGIC Pocket Data Book (Rev. B)		16 ene 2007
	Product overview	Design Summary for WCSP Little Logic (Rev. B)		04 nov 2004
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection		08 jul 2004
	Application note	Selecting the Right Level Translation Solution (Rev. A)		22 jun 2004
	User guide	Signal Switch Data Book (Rev. A)		14 nov 2003
	Application note	Use of the CMOS Unbuffered Inverter in Oscillator Circuits		06 nov 2003
	User guide	LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)		18 dic 2002
	Application note	Texas Instruments Little Logic Application Report		01 nov 2002
	Application note	TI IBIS File Creation, Validation, and Distribution Processes		29 ago 2002
	More literature	Standard Linear & Logic for PCs, Servers & Motherboards		13 jun 2002
	Application note	16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)		22 may 2002
	Application note	Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices		10 may 2002
	More literature	STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS		27 mar 2002
	Application note	Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices		01 dic 1997
	Application note	Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)		01 ago 1997
	Application note	CMOS Power Consumption and CPD Calculation (Rev. B)		01 jun 1997
	Application note	LVC Characterization Information		01 dic 1996
	Application note	Input and Output Characteristics of Digital Integrated Circuits		01 oct 1996
	Application note	Live Insertion		01 oct 1996
	Design guide	Low-Voltage Logic (LVC) Designer's Guide		01 sep 1996
	Application note	Understanding Advanced Bus-Interface Products Design Guide		01 may 1996

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