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TCA39416

ACTIVO

Convertidor I3C de tensión ultrabaja con aceleradores de tiempo de subida

Detalles del producto

Features Output Enable Protocols I2C, I3C Frequency (max) (MHz) 12.5 VCCA (min) (V) 0.72 VCCA (max) (V) 1.98 VCCB (min) (V) 0.72 VCCB (max) (V) 1.98 Supply restrictions No rule Rating Catalog Operating temperature range (°C) -40 to 125
Features Output Enable Protocols I2C, I3C Frequency (max) (MHz) 12.5 VCCA (min) (V) 0.72 VCCA (max) (V) 1.98 VCCB (min) (V) 0.72 VCCB (max) (V) 1.98 Supply restrictions No rule Rating Catalog Operating temperature range (°C) -40 to 125
SOT-23-THN (DDF) 8 8.12 mm² 2.9 x 2.8 X2SON (DTW) 8 1.35 mm² 1 x 1.35
  • 2-bit dual supply bidirectional translator for I3C, I 2C, SMBus, SPI applications
  • Provides bidirectional voltage translation with no direction pin
  • High-impedance output Ax and Bx pins when OE = 0 V or V CC = 0 V
  • Internal 10-kΩ pull-up resistor on Ax and Bx pins
  • 0.72 V to 1.98 V on both A and B ports; V CCA ≤ V CCB
  • Compatible with MIPI I3C supporting speeds up to 12.5 MHz
  • Compatible with JEDEC I3C module sideband bus specification (JESD403)
  • V CC Isolation feature: If either V CC input is at GND, both A and B ports are in the high-impedance state
  • No power-supply sequencing required: either V CCA or V CCB can be ramped first
  • Low I off of 2.5 µA when either V CCA or V CCB = 0 V
  • OE input can be tied directly to V CCA or controlled by GPIO
  • Latch-up performance exceeds 100 mA per JESD 78, class II
  • ESD Protection exceeds JESD 22
    • 4000-V Human-body model (A114-B)
    • 1500-V Charged-device model (C101)
  • 2-bit dual supply bidirectional translator for I3C, I 2C, SMBus, SPI applications
  • Provides bidirectional voltage translation with no direction pin
  • High-impedance output Ax and Bx pins when OE = 0 V or V CC = 0 V
  • Internal 10-kΩ pull-up resistor on Ax and Bx pins
  • 0.72 V to 1.98 V on both A and B ports; V CCA ≤ V CCB
  • Compatible with MIPI I3C supporting speeds up to 12.5 MHz
  • Compatible with JEDEC I3C module sideband bus specification (JESD403)
  • V CC Isolation feature: If either V CC input is at GND, both A and B ports are in the high-impedance state
  • No power-supply sequencing required: either V CCA or V CCB can be ramped first
  • Low I off of 2.5 µA when either V CCA or V CCB = 0 V
  • OE input can be tied directly to V CCA or controlled by GPIO
  • Latch-up performance exceeds 100 mA per JESD 78, class II
  • ESD Protection exceeds JESD 22
    • 4000-V Human-body model (A114-B)
    • 1500-V Charged-device model (C101)

The TCA39416 is a 2-bit bidirectional MIPI I3C v1.1.1, I 2C, SMBus and SPI voltage-level translator with an output enable (OE) input and rising and falling edge accelerators. It is operational from 0.72 V to 1.98 V on both the A-side and B-side with V CCA must be less than V CCB for proper operation. This limitation allows the device to interface between lower and higher logic signal levels at any of the typical 1-V, 1.2-V and 1.8-V supply rails.

The OE input pin is referenced to V CCA, can be tied directly to V CCA, but it is also 1.98-V tolerant. The OE pin can also be controlled and set to a logic low to place all the Ax (A1, A2) and Bx (B1, B2) pins in a high-impedance state, which significantly reduces the quiescent current consumption.

The TCA39416 is compatible with 12.5 MHz I3C speeds and also supports higher speed SPI applications with two devices. It also enables bidirectional voltage level translation for traditional I2C-bus/SMBus applications under normal I 2C and SMBus configurations.

The TCA39416 features internal 10-kΩ pull-up resistors on Ax and Bx that act as high-keeper and are enabled based on respective V CC voltage when bus is high.

The TCA39416 is a 2-bit bidirectional MIPI I3C v1.1.1, I 2C, SMBus and SPI voltage-level translator with an output enable (OE) input and rising and falling edge accelerators. It is operational from 0.72 V to 1.98 V on both the A-side and B-side with V CCA must be less than V CCB for proper operation. This limitation allows the device to interface between lower and higher logic signal levels at any of the typical 1-V, 1.2-V and 1.8-V supply rails.

The OE input pin is referenced to V CCA, can be tied directly to V CCA, but it is also 1.98-V tolerant. The OE pin can also be controlled and set to a logic low to place all the Ax (A1, A2) and Bx (B1, B2) pins in a high-impedance state, which significantly reduces the quiescent current consumption.

The TCA39416 is compatible with 12.5 MHz I3C speeds and also supports higher speed SPI applications with two devices. It also enables bidirectional voltage level translation for traditional I2C-bus/SMBus applications under normal I 2C and SMBus configurations.

The TCA39416 features internal 10-kΩ pull-up resistors on Ax and Bx that act as high-keeper and are enabled based on respective V CC voltage when bus is high.

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Documentación técnica

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* Data sheet TCA39416 Ultra-Low-Voltage I3C Translator with Rise Time Accelerators datasheet (Rev. B) PDF | HTML 03 nov 2023
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 03 jul 2024
Application brief I3C Voltage Translator and Multiplexer Quick Reference PDF | HTML 04 ene 2024
User guide TCA39416EVM User's Guide PDF | HTML 15 dic 2022
Certificate TCA39416EVM EU RoHS Declaration of Conformity (DoC) 30 nov 2022

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

TCA39416EVM — Módulo de evaluación TCA39416 para la conversión de tensión de bus I3C de baja tensión

Esta EVM proporciona condiciones de carga conmutables a través de conexiones de puente para abrir resistencias y capacitancia del bus, lo que permite a los diseñadores probar fácilmente el rendimiento de este dispositivo en su sistema.

Guía del usuario: PDF | HTML
Herramienta de diseño

I2C-DESIGNER — Herramienta de diseño I2C

Use the I2C Designer tool to quickly resolve conflicts in addressing, voltage level and frequency in I2C based designs. Enter master and slave inputs to automatically generate an I2C tree or easily build a custom solution. This tool will help designers save time and comply with the I2C standard (...)
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SOT-23-THN (DDF) 8 Ultra Librarian
X2SON (DTW) 8 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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