TPS40021

The TPS4002x family of dc-to-dc controllers are designed for non-isolated synchronous buck regulators, providing enhanced operation and design flexability through user programmability.

The TPS4002x utilizes a proprietary Predictive Gate Drive™ technology to minimize the diode conduction losses associated with the high-side and synchronous rectifier N-channel MOSFET transistions. The integrated charge pump with boost circuit provides a regulated 5-V gate drive for both the high side and synchronous rectifier N-channel MOSFETs. The use of the Predictive Gate Drive™ technology and charge pump/boost circuits combine to provide a highly efficient, smaller and less expensive converter.

Design flexibility is provided through user programmability of such functions as: operating frequency, short circuit current detection thresholds, soft-start ramp time, and external synchronization frequency. The operating frequency is programmable using a single resistor over a frequency range of 100 kHz to 1 MHz. Higher operating frequencies yield smaller component values for a given converter power level as well as faster loop closure.

The short circuit current detection is programmable through a single resistor, allowing the short circuit current limit detection threshold to be easily tailored to accommodate different size (R_DS(on)) MOSFETs. The short circuit current function provides pulse-by-pulse current limiting during soft-start and short term transient conditions as well as a fault counter to handle longer duration short circuit current conditions. If a fault is detected the controller shuts down for a period of time determined by six (6) consecutive soft-start cycles. The controller automatically retries the output every seventh (7^th) soft-start cycle.

In addition to determining the off time during a fault condition, the soft-start ramp provides a closed loop controlled ramp of the converter output during startup. Programmability allows the ramp rate to be adjusted for a wide variety of output L-C component values.

The output voltage transient comparators provide a quick response, first strike, approach to output voltage transients. The output voltage is sensed through a resistor divider at the OSNS pin. If an overvoltage condition is detected the HDRV gate drive is shut-off and the LDRV gate drive is turned on until the output is returned to regulation. Similarly, if an output undervoltage condition is sensed the HDRV gate drive goes to 95% duty cycle to pump the output back up quickly. In either case, the PowerGood open drain output pulls low to indicate an output voltage out of regulation condition. The PowerGood output can be daisy-chained to the SS/SD pin or enable pin of other controllers or converters. The transient comparators can be disabled by simply tying the OSNS pin to VDD.

The TPS4002X can be externally synchronized through the ILIM/SYNC pin up to 1.5× the free-running frequency. This allows multiple contollers to be synchronized to eliminate EMI concerns due to input beat frequencies between controllers.