CD4016B
- 20V digital or ± 10V peak-to-peak switching
- 280Ω typical on-state resistance for 15V operation
- Switch on-state resistance matched to within 10Ω typ over 15V signal-input range
- High on/off output-voltage ratio: 65dB typ at f is = 10kHz, RL= 10kΩ
- High degree of linearity: <0.5% distortion typat f is= 1kHz, V is= 5Vp-p, V DD −V SS ⩾10V, R L = 10kΩ
- Extremely low off-state switch leakage resulting in very low offset current and high effective off-state resistance: 100pA typ. at V DD −V SS =18V, T A=25°C
- Extremely high control input impedance (control circuit isolated from signal circuit: 10 12 Ω typ.
- Low crosstalk between switches: −50dB typ at f is = 0.9MHz, R L = 1kΩ
- Matched control-input to signal-output capacitance: Reduces output signal transients
- Frequency response, switch on = 40MHz (typical)
- 100% tested for quiescent current at 20V
- Maximum control input current of 1µA at 18V over full package temperature range; 100nA at 18V at 25°C
- 5V, 10V, and 15V parametric ratings
For transmission or multiplexing of analog or digital signals high-voltage types (20V rating).
CD4016B B Series types are quad bilateral switches intended for the transmission or multiplexing of analog or digital signals. Each of the four independent bilateral switches has a single control signal input which simultaneously biases both the p and n device in a given switch on or off.
The CD4016B B Series types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).
기술 자료
| 유형 | 직함 | 날짜 | ||
|---|---|---|---|---|
| * | Data sheet | CD4016B Types CMOS Quad Bilateral Switch datasheet (Rev. D) | PDF | HTML | 2024/05/16 |
| Application note | Selecting the Correct Texas Instruments Signal Switch (Rev. E) | PDF | HTML | 2022/06/02 | |
| Application note | Multiplexers and Signal Switches Glossary (Rev. B) | PDF | HTML | 2021/12/01 | |
| Selection guide | Logic Guide (Rev. AB) | 2017/06/12 | ||
| Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 2015/12/02 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 2007/01/16 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004/07/08 | ||
| User guide | Signal Switch Data Book (Rev. A) | 2003/11/14 | ||
| Application note | Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics | 2001/12/03 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
LEADED-ADAPTER1 — TI의 5, 8, 10, 16 및 24핀 리드 패키지의 빠른 테스트를 위한 DIP 헤더 어댑터에 대한 표면 실장
The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages. The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| PDIP (N) | 14 | Ultra Librarian |
| SOIC (D) | 14 | Ultra Librarian |
| SOP (NS) | 14 | Ultra Librarian |
| TSSOP (PW) | 14 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치