TPS3106
- Precision Supply Voltage Supervision Range:
0.9 V, 1.2 V, 1.5 V, 1.6 V, 2 V, and 3.3 V - High Trip-Point Accuracy: 0.75%
- Supply Current of 1.2 µA (Typical)
- RESET Defined With Input Voltages as Low as 0.4 V
- Power-On Reset Generator With a Delay Time of 130 ms
- Push/Pull or Open-Drain RESET Outputs
- Package Temperature Range: –40°C to 125°C
The TPS310x and TPS311x families of supervisory circuits provide circuit initialization and timing supervision, primarily for DSP and processor-based systems.
During power-on, RESET is asserted low when the supply voltage (VDD) becomes higher than 0.4 V. Thereafter, the supervisory circuit monitors VDD and keeps the RESET output low as long as VDD remains below the threshold voltage (VIT–). To ensure proper system reset, after VDD surpasses the threshold voltage, an internal timer delays the transition of the RESET signal from low to high for the specified time. When VDD drops below VIT–, the output transitions low again.
All the devices of this family have a fixed-sense threshold voltage (VIT–) set by an internal voltage divider.
The TPS3103 and TPS3106 devices have an active-low, open-drain RESET output and either an integrated power-fail input (PFI) or SENSE input with corresponding outputs for monitoring other voltages. The TPS3110 has an active-low push/pull RESET and a watchdog timer to monitor the operation of microprocessors. All three devices have a manual reset pin that can be used to force the outputs low regardless of the sensed voltages.
The product spectrum is designed for supply voltages of 0.9 V up to 3.6 V. The circuits are available in 6-pin SOT-23 packages. The TPS31xx family is characterized for operation over a temperature range of –40°C to 125°C.
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | TPS31xx Ultralow Supply-Current Voltage Monitor With Optional Watchdog datasheet (Rev. G) | PDF | HTML | 2016/09/28 |
Selection guide | Voltage Supervisors (Reset ICs) Quick Reference Guide (Rev. H) | 2020/02/28 | ||
E-book | Voltage Supervisor and Reset ICs: Tips, Tricks and Basics | 2019/06/28 | ||
Selection guide | Power Management Guide 2018 (Rev. R) | 2018/06/25 | ||
Design guide | High-Availability Industrial High-Speed Counter Pulse Train Output Design Guide | 2015/06/15 | ||
Application note | Choosing an Appropriate Pull-up/Pull-down Resistor for Open Drain Outputs | 2011/09/19 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
High Availability High Speed Counter and Pulse Train Output Assembly Drawing
High Availability High Speed Counter and Pulse Train Output CAD Files
High Availability High Speed Counter and Pulse Train Output Gerber
PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®
TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
SOT-23 (DBV) | 6 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치