TPS3828
- Power-on reset generator with a fixed delay time of 200 ms (TPS3823, TPS3824, TPS3825, and TPS3828) or 25 ms (TPS3820)
- Manual reset input (TPS3820, TPS3823, TPS3825, and TPS3828)
- Reset output available in active-low (TPS3820, TPS3823, TPS3824, and TPS3825), active-high (TPS3824 and TPS3825), and open drain (TPS3828)
- Supply voltage supervision range: 2.5 V, 3 V, 3.3 V, 5 V
- Watchdog timer (TPS3820, TPS3823, TPS3824, and TPS3828)
- Supply current of 15 µA (typical)
- 5-pin SOT-23 package
- Temperature range: −40°C to 85°C (−40°C to 125°C for TPS3823A-33)
The TPS382x family of supervisors provide circuit initialization and timing supervision, primarily for DSP and processor-based systems. During power on, RESET asserts when the supply voltage VDD becomes greater than 1.1 V. Thereafter, the supply voltage supervisor monitors VDD and keeps RESET active low as long as VDD remains less than the threshold voltage, VIT−. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td, starts after VDD has risen above the threshold voltage (VIT− + VHYS). When the supply voltage drops below the threshold voltage VIT−, the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage, VIT–, set by an internal voltage divider. The TPS382x family also offers watchdog time out options of 200 ms (TPS3820) and 1.6 s (TPS3823, TPS3824, and TPS3828).
관심 가지실만한 유사 제품
비교 대상 장치보다 업그레이드된 기능을 지원하는 드롭인 대체품
비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀
기술 자료
설계 및 개발
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TPS382-Q1EVM — 통합 워치독을 지원하는 TPS382x-Q1 전압 수퍼바이저용 평가 모듈
System on Module for Industrial Power Line Comm. (CENELEC) Assembly Drawings
System on Module for Power Line Communication (FCC Frequency Band) Assembly
System on Module for Power Line Communication (CENELEC Freq. Band) Assembly
Extending Network Coverage Reliability Standards-based Protocols Assembly Files
System on Module for Prime Power Line Communication Bill of Materials (BOM)
System on Module for Industrial Power Line Communication (CENELEC) BOM
System on Module for Power Line Communication (FCC Frequency Band) BOM
System on Module for Power Line Communication (CENELEC Freq. Band) BOM
Extending Network Coverage Reliability with Standards-based Protocols BOM
System on Module for Industrial Power Line Communication (CENELEC) CAD Files
System on Module for Power Line Communication (FCC Frequency Band) CAD Files
System on Module for Power Line Communication (CENELEC Freq. Band) CAD Files
Extending Network Coverage Reliability with Standards-based Protocols CAD Files
System on Module for Prime Power Line Communication Design Files
TIDM-SOMPLC-F28M35 Power Line Communication System on Module Design Files
System on Module for G3-PLC Power Line Communication (CENELEC) Gerber Files
System on Module for Industrial Power Line Communication (CENELEC) Gerber Files
System on Module for Power Line Communication (FCC Frequency Band) Gerber Files
System on Module for Power Line Communication (CENELEC Freq. Band) Gerber Files
Extending Network Coverage Reliability with Standards-based Protocols Gerber
System on Module for Industrial Power Line Communication (CENELEC) Layer Plots
System on Module for Power Line Communication (FCC Frequency Band) PCB Layout
System on Module for Power Line Communication (CENELEC Freq. Band) PCB Layout
Extending Network Coverage Reliability with Standard-based Protocols Layer Plots
System on Module for Industrial Power Line Communication (CENELEC) Schematic
System on Module for Power Line Communication (FCC Frequency Band) Schematic
System on Module for Power Line Communication (CENELEC Freq. Band) Schematic
Extending Network Coverage Reliability with Standards-based Protocols Schematic
PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®
TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
TIDA-010055 — 보호 릴레이 모듈을 위한 진단 기능이 포함된 비절연 전원 아키텍처 레퍼런스 설계
패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
SOT-23 (DBV) | 5 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치