홈 스위치 및 멀티플렉서 프로토콜별 스위치 및 멀티플렉서
홈
스위치 및 멀티플렉서
프로토콜별 스위치 및 멀티플렉서

TS3L100

활성

3.3V, 2:1(SPDT), 4채널 LAN 스위치

지금 주문
데이터 시트

TS3L100

활성
데이터 시트 지금 주문

제품 상세 정보

Protocols 10 BASE-T, 100 BASE-T, LAN Configuration 2:1 SPDT Number of channels 4 Bandwidth (MHz) 350 Supply voltage (max) (V) 3.6 Supply voltage (min) (V) 3 Ron (typ) (mΩ) 10000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 3.6 Supply current (typ) (µA) 0.1 ESD HBM (typ) (kV) 2 Operating temperature range (°C) 0 to 70 Crosstalk (dB) -68 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 10 CON (typ) (pF) 3 Off isolation (typ) (dB) -42 OFF-state leakage current (max) (µA) 1 Propagation delay time (µs) 0.0075 Ron (max) (mΩ) 15000 Ron channel match (max) (Ω) 1 RON flatness (typ) (Ω) 1 Turnoff time (disable) (max) (ns) 3.5 Turnon time (enable) (max) (ns) 7.5 VIH (min) (V) 2 VIL (max) (V) 0.8
Protocols 10 BASE-T, 100 BASE-T, LAN Configuration 2:1 SPDT Number of channels 4 Bandwidth (MHz) 350 Supply voltage (max) (V) 3.6 Supply voltage (min) (V) 3 Ron (typ) (mΩ) 10000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 3.6 Supply current (typ) (µA) 0.1 ESD HBM (typ) (kV) 2 Operating temperature range (°C) 0 to 70 Crosstalk (dB) -68 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 10 CON (typ) (pF) 3 Off isolation (typ) (dB) -42 OFF-state leakage current (max) (µA) 1 Propagation delay time (µs) 0.0075 Ron (max) (mΩ) 15000 Ron channel match (max) (Ω) 1 RON flatness (typ) (Ω) 1 Turnoff time (disable) (max) (ns) 3.5 Turnon time (enable) (max) (ns) 7.5 VIH (min) (V) 2 VIL (max) (V) 0.8
SOIC (D) 16 59.4 mm² 9.9 x 6 SSOP (DBQ) 16 29.4 mm² 4.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4 TVSOP (DGV) 16 23.04 mm² 3.6 x 6.4 VQFN (RGY) 16 14 mm² 4 x 3.5
  • Wide Bandwidth (BW = 350 MHz Min)
  • Low Differential Crosstalk (XTALK = –68 dB Typ)
  • Low Power Consumption (ICC = 10 µA Max)
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low ON-State Resistance (ron = 5 Typ)
  • Rail-to-Rail Switching on Data I/O Ports (0 to VCC)
  • VCC Operating Range From 3 V to 3.6 V
  • Ioff Supports Partial-Power-Down Mode Operation
  • Data and Control Inputs Have Undershoot Clamp Diodes
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Suitable for Both 10 Base-T/100 Base-T Signaling
  • Wide Bandwidth (BW = 350 MHz Min)
  • Low Differential Crosstalk (XTALK = –68 dB Typ)
  • Low Power Consumption (ICC = 10 µA Max)
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low ON-State Resistance (ron = 5 Typ)
  • Rail-to-Rail Switching on Data I/O Ports (0 to VCC)
  • VCC Operating Range From 3 V to 3.6 V
  • Ioff Supports Partial-Power-Down Mode Operation
  • Data and Control Inputs Have Undershoot Clamp Diodes
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Suitable for Both 10 Base-T/100 Base-T Signaling

The TI TS3L100 LAN switch is a 4-bit 1-of-2 multiplexer/demultiplexer with a single switch-enable (E)\ input. When E\ is low, the switch is enabled and the I port is connected to the Y port. When E\ is high, the switch is disabled and the high-impedance state exists between the I and Y ports. The select (S) input controls the data path of the multiplexer/demultiplexer.

This device can be used to replace mechanical relays in LAN applications. This device has low ron, wide bandwidth, and low differential crosstalk, making it suitable for 10 Base-T, 100 Base-T, and various other LAN applications.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, E\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The TI TS3L100 LAN switch is a 4-bit 1-of-2 multiplexer/demultiplexer with a single switch-enable (E)\ input. When E\ is low, the switch is enabled and the I port is connected to the Y port. When E\ is high, the switch is disabled and the high-impedance state exists between the I and Y ports. The select (S) input controls the data path of the multiplexer/demultiplexer.

This device can be used to replace mechanical relays in LAN applications. This device has low ron, wide bandwidth, and low differential crosstalk, making it suitable for 10 Base-T, 100 Base-T, and various other LAN applications.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, E\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
4개 모두 보기
유형 직함 날짜
* Data sheet TS3L100 datasheet (Rev. A) 2004/10/12
Application note Preventing Excess Power Consumption on Analog Switches 2008/07/03
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08
More literature TS5L100 and TS3L100 Application Clip 2004/05/25

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

인터페이스 어댑터

LEADED-ADAPTER1 — TI의 5, 8, 10, 16 및 24핀 리드 패키지의 빠른 테스트를 위한 DIP 헤더 어댑터에 대한 표면 실장

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

사용 설명서: PDF
TI.com에서 구매 불가
인터페이스 어댑터

LEADLESS-ADAPTER1 — TI의 6, 8, 10, 12, 14, 16 및 20핀 리드 없는 패키지의 테스트를 위한 DIP 헤더 어댑터에 대한 표면 실장

The EVM-LEADLESS1 board allows for quick testing and bread boarding of TI's common leadless packages.  The board has footprints to convert TI's DRC, DTP, DQE, RBW, RGY, RSE, RSV, RSW RTE, RTJ, RUK , RUC, RUG, RUM,RUT and YZP surface mount packages to 100mil DIP headers.
사용 설명서: PDF
TI.com에서 구매 불가
패키지 핀 CAD 기호, 풋프린트 및 3D 모델
SOIC (D) 16 Ultra Librarian
SSOP (DBQ) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
TVSOP (DGV) 16 Ultra Librarian
VQFN (RGY) 16 Ultra Librarian
TI의 평가 항목에 대한 표준 약관이 적용됩니다.

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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지원 및 교육

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포럼 주제 모두 보기(영문)

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