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TMUX1574 활성 전원 차단 보호 및 1.8V 입력 로직을 지원하는 5V, 2:1(SPDT), 4채널 아날로그 스위치 Lower Ron replacement

제품 상세 정보

Configuration 4:1 Number of channels 2 Power supply voltage - single (V) 5 Protocols Analog Ron (typ) (Ω) 3 CON (typ) (pF) 100 Supply current (typ) (µA) 10 Bandwidth (MHz) 25 Operating temperature range (°C) -40 to 85 Features Supports input voltage beyond supply Input/output continuous current (max) (mA) 100 Rating Catalog Drain supply voltage (max) (V) 5.25 Supply voltage (max) (V) 5.25
Configuration 4:1 Number of channels 2 Power supply voltage - single (V) 5 Protocols Analog Ron (typ) (Ω) 3 CON (typ) (pF) 100 Supply current (typ) (µA) 10 Bandwidth (MHz) 25 Operating temperature range (°C) -40 to 85 Features Supports input voltage beyond supply Input/output continuous current (max) (mA) 100 Rating Catalog Drain supply voltage (max) (V) 5.25 Supply voltage (max) (V) 5.25
SSOP (DBQ) 16 29.4 mm² 4.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4
  • Low and Flat ON-State Resistance (ron) Characteristics Over Operating Range (ron = 3 Typ)
  • 0- to 10-V Switching on Data I/O Ports
  • Bidirectional Data Flow With Near-Zero Propagation Delay
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 20 pF Max, B Port)
  • VCC Operating Range From 4.75 V to 5.25 V
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: PCI Interface, Differential Signal Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

  • Low and Flat ON-State Resistance (ron) Characteristics Over Operating Range (ron = 3 Typ)
  • 0- to 10-V Switching on Data I/O Ports
  • Bidirectional Data Flow With Near-Zero Propagation Delay
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 20 pF Max, B Port)
  • VCC Operating Range From 4.75 V to 5.25 V
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: PCI Interface, Differential Signal Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

The TS5N214 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distorion on the data bus. Specifically designed to support high-bandwidth applications, the TS5N214 provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.

The TS5N214 is a 2-bit 1-of-4 multiplexer/demultiplexer with separate output-enable (1OE, 2OE) inputs. The select (S0, S1) inputs control the data path of the multiplexer/demultiplexer. When OE is low, the multiplexer/demultiplexer is enabled and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the multiplexer/demultiplexer is disabled and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The TS5N214 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distorion on the data bus. Specifically designed to support high-bandwidth applications, the TS5N214 provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.

The TS5N214 is a 2-bit 1-of-4 multiplexer/demultiplexer with separate output-enable (1OE, 2OE) inputs. The select (S0, S1) inputs control the data path of the multiplexer/demultiplexer. When OE is low, the multiplexer/demultiplexer is enabled and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the multiplexer/demultiplexer is disabled and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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비교 대상 장치와 유사한 기능
TMUX4827 활성 +/-12V 공급 범위를 벗어남, 1.8V 호환 로직을 지원하는 2:1(SPDT) 2채널 스위치 Lower internal resistance

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* Data sheet TS5N214 datasheet 2005/07/28

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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