產品詳細資料

Configuration 1:1 SPST Number of channels 4 Power supply voltage - single (V) 2.5, 3.3, 5, 12 Protocols Analog Ron (typ) (Ω) 15 CON (typ) (pF) 5 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 200 Operating temperature range (°C) -55 to 125 Input/output continuous current (max) (mA) 25 Rating Catalog Drain supply voltage (max) (V) 10 Supply voltage (max) (V) 10
Configuration 1:1 SPST Number of channels 4 Power supply voltage - single (V) 2.5, 3.3, 5, 12 Protocols Analog Ron (typ) (Ω) 15 CON (typ) (pF) 5 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 200 Operating temperature range (°C) -55 to 125 Input/output continuous current (max) (mA) 25 Rating Catalog Drain supply voltage (max) (V) 10 Supply voltage (max) (V) 10
PDIP (N) 14 181.42 mm² 19.3 x 9.4 SOIC (D) 14 51.9 mm² 8.65 x 6 TSSOP (PW) 14 32 mm² 5 x 6.4
  • Wide analog-input-voltage range: 0 V – 10 V
  • Low ON resistance:
    • VCC = 4.5 V: 25 Ω
    • VCC = 9 V: 15 Ω
  • Fast switching and propagation delay times
  • Low OFF leakage current
  • Wide operating temperature range: –55°C to 125°C
  • HC types:
    • 2 V to 10 V operation
    • High noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5 V and 10 V
  • HCT types:
    • Direct LSTTL input logic compatibility, VIL= 0.8 V (maximum), VIH = 2 V (minimum)
    • CMOS input compatibility, Il ≤ 1 µA at VOL, VOH
  • Wide analog-input-voltage range: 0 V – 10 V
  • Low ON resistance:
    • VCC = 4.5 V: 25 Ω
    • VCC = 9 V: 15 Ω
  • Fast switching and propagation delay times
  • Low OFF leakage current
  • Wide operating temperature range: –55°C to 125°C
  • HC types:
    • 2 V to 10 V operation
    • High noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5 V and 10 V
  • HCT types:
    • Direct LSTTL input logic compatibility, VIL= 0.8 V (maximum), VIH = 2 V (minimum)
    • CMOS input compatibility, Il ≤ 1 µA at VOL, VOH

The ’HC4066 and CD74HCT4066 devices contain four independent digitally controlled analog switches that use silicon-gate CMOS technology to achieve operating speeds similar to LSTTL with the low power consumption of standard CMOS integrated circuits.

These switches feature the characteristic linear ON resistance of the metal-gate CD4066B device. Each switch is turned on by a high-level voltage on its control input.

The ’HC4066 and CD74HCT4066 devices contain four independent digitally controlled analog switches that use silicon-gate CMOS technology to achieve operating speeds similar to LSTTL with the low power consumption of standard CMOS integrated circuits.

These switches feature the characteristic linear ON resistance of the metal-gate CD4066B device. Each switch is turned on by a high-level voltage on its control input.

下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 16
類型 標題 日期
* Data sheet High-Speed CMOS Logic Quad Bilateral Switch datasheet (Rev. E) PDF | HTML 2024年 7月 16日
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 2022年 6月 2日
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 2021年 12月 1日
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021年 7月 26日
Selection guide Logic Guide (Rev. AB) 2017年 6月 12日
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
User guide LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
User guide Signal Switch Data Book (Rev. A) 2003年 11月 14日
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002年 8月 29日
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 1997年 6月 1日
Application note Designing With Logic (Rev. C) 1997年 6月 1日
Application note Input and Output Characteristics of Digital Integrated Circuits 1996年 10月 1日
Application note Live Insertion 1996年 10月 1日
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 1996年 5月 1日
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 1996年 4月 1日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

介面轉接器

LEADED-ADAPTER1 — 適用於快速測試 TI 的 5、8、10、16 及 24 針腳引線封裝的表面貼裝至 DIP 接頭適配器

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

使用指南: PDF
TI.com 無法提供
封裝 針腳 CAD 符號、佔位空間與 3D 模型
PDIP (N) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片