首頁 介面 I2C & I3C ICs I2C 通用 I/O (GPIO)

PCA9554A

現行

具中斷、弱推拉和配置暫存器的 8 位元 2.3 至 5.5-V I2C/SMBus I/O 擴展器

現在提供此產品的更新版本

open-in-new 比較替代產品
可直接投入的替代產品,相較於所比較的裝置,具備升級功能
TCA9554A 現行 具中斷、弱推拉和配置暫存器的 8 位元 1.65 至 5.5-V I2C/SMBus I/O 擴展器 Performance enhancements for power-on reset, interrupt, and lower voltage operation.

產品詳細資料

Number of I/Os 8 Features Configuration registers, Interrupt pin Supply voltage (min) (V) 2.3 Supply voltage (max) (V) 5.5 Addresses 8 Rating Catalog Frequency (max) (MHz) 0.4 Operating temperature range (°C) -40 to 85
Number of I/Os 8 Features Configuration registers, Interrupt pin Supply voltage (min) (V) 2.3 Supply voltage (max) (V) 5.5 Addresses 8 Rating Catalog Frequency (max) (MHz) 0.4 Operating temperature range (°C) -40 to 85
SOIC (DW) 16 106.09 mm² 10.3 x 10.3 SSOP (DB) 16 48.36 mm² 6.2 x 7.8 SSOP (DBQ) 16 29.4 mm² 4.9 x 6 TVSOP (DGV) 16 23.04 mm² 3.6 x 6.4 VQFN (RGT) 16 9 mm² 3 x 3 VQFN (RGV) 16 16 mm² 4 x 4
  • I2C to Parallel Port Expander
  • Open-Drain Active-Low Interrupt Output
  • Operating Power-Supply Voltage Range of 2.3 V to 5.5 V
  • 5-V Tolerant I/Os
  • 400-kHz Fast I2C Bus
  • Three Hardware Address Pins Allow up to Eight Devices on the I2C/SMBus
  • Input/Output Configuration Register
  • Polarity Inversion Register
  • Internal Power-On Reset
  • Power-Up With All Channels Configured as Inputs
  • No Glitch on Power Up
  • Latched Outputs With High-Current Drive Maximum Capability for Directly Driving LEDs
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • I2C to Parallel Port Expander
  • Open-Drain Active-Low Interrupt Output
  • Operating Power-Supply Voltage Range of 2.3 V to 5.5 V
  • 5-V Tolerant I/Os
  • 400-kHz Fast I2C Bus
  • Three Hardware Address Pins Allow up to Eight Devices on the I2C/SMBus
  • Input/Output Configuration Register
  • Polarity Inversion Register
  • Internal Power-On Reset
  • Power-Up With All Channels Configured as Inputs
  • No Glitch on Power Up
  • Latched Outputs With High-Current Drive Maximum Capability for Directly Driving LEDs
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

The PCA9554A open-drain interrupt ( INT) output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system master that an input state has changed.

INT can be connected to the interrupt input of a microcontroller. By sending an interrupt signal on this line, the remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via the I2C bus. Thus, the PCA9554A can remain a simple slave device.

The device’s outputs (latched) have high-current drive capability for directly driving LEDs and low current consumption.

Three hardware pins (A0, A1, and A2) are used to program and vary the fixed I2C address and allow up to eight devices to share the same I2C bus or SMBus.

The PCA9554A is pin-to-pin and I2C address compatible with the PCF8574A. However, software changes are required, due to the enhancements in the PCA9554A over the PCF8574A.

The PCA9554A and PCA9554 are identical except for their fixed I2C address. This allows for up to 16 of these devices (8 of each) on the same I2C/SMBus.

The PCA9554A open-drain interrupt ( INT) output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system master that an input state has changed.

INT can be connected to the interrupt input of a microcontroller. By sending an interrupt signal on this line, the remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via the I2C bus. Thus, the PCA9554A can remain a simple slave device.

The device’s outputs (latched) have high-current drive capability for directly driving LEDs and low current consumption.

Three hardware pins (A0, A1, and A2) are used to program and vary the fixed I2C address and allow up to eight devices to share the same I2C bus or SMBus.

The PCA9554A is pin-to-pin and I2C address compatible with the PCF8574A. However, software changes are required, due to the enhancements in the PCA9554A over the PCF8574A.

The PCA9554A and PCA9554 are identical except for their fixed I2C address. This allows for up to 16 of these devices (8 of each) on the same I2C/SMBus.

下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 11
類型 標題 日期
* Data sheet PCA9554A Remote 8-Bit I2C and SMBus I/O Expander With Interrupt Output and Configuration Registers datasheet (Rev. F) PDF | HTML 2021年 3月 12日
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024年 7月 3日
Application note I2C Dynamic Addressing 2019年 4月 25日
Selection guide Logic Guide (Rev. AB) 2017年 6月 12日
Application note Choosing the Correct I2C Device for New Designs PDF | HTML 2016年 9月 7日
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
Application note Understanding the I2C Bus PDF | HTML 2015年 6月 30日
Application note Maximum Clock Frequency of I2C Bus Using Repeaters 2015年 5月 15日
Application note I2C Bus Pull-Up Resistor Calculation PDF | HTML 2015年 2月 13日
Application note Programming Fun Lights With TI's TCA6507 2007年 11月 30日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

設計工具

I2C-DESIGNER — I2C 設計工具

Use the I2C Designer tool to quickly resolve conflicts in addressing, voltage level and frequency in I2C based designs. Enter master and slave inputs to automatically generate an I2C tree or easily build a custom solution. This tool will help designers save time and comply with the I2C standard (...)
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (DW) 16 Ultra Librarian
SSOP (DB) 16 Ultra Librarian
SSOP (DBQ) 16 Ultra Librarian
TVSOP (DGV) 16 Ultra Librarian
VQFN (RGT) 16 Ultra Librarian
VQFN (RGV) 16 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片