SLVA787 September 2016 LM8330 , LM8335 , P82B715 , P82B96 , PCA6107 , PCA9306 , PCA9306-Q1 , PCA9515A , PCA9515B , PCA9518 , PCA9534 , PCA9534A , PCA9535 , PCA9536 , PCA9538 , PCA9539 , PCA9543A , PCA9544A , PCA9545A , PCA9546A , PCA9548A , PCA9554 , PCA9554A , PCA9555 , PCA9557 , PCF8574 , PCF8574A , PCF8575 , PCF8575C , TCA4311A , TCA6408A , TCA6416A , TCA6418E , TCA6424A , TCA9509 , TCA9517 , TCA9517A , TCA9534 , TCA9534A , TCA9535 , TCA9538 , TCA9539 , TCA9539-Q1 , TCA9543A , TCA9544A , TCA9545A , TCA9546A , TCA9548A , TCA9554 , TCA9554A , TCA9555 , TCA9617A , TCA9617B , TCA9800 , TCA9801 , TCA9802 , TCA9803
The I2C bus is a very popular and powerful bus used for communication between a single (or multiple) master and a single (or multiple) slave device. In many applications there is a potential need for more slave devices on the bus, isolation between similar addressed slaves, or a need for more I/Os. These needs can be solved with an I2C buffer, switch, and I/O expander.
The application note helps users understand the use-cases of buffers and repeaters, switches, and I/O expanders and how to select the appropriate device for an application.
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The I2C bus is a standard bidirectional interface that uses a controller, known as the master, to communicate with slave devices. A slave may not transmit data unless it has been addressed by the master. Each device on the I2C bus has a specific device address to differentiate between other devices that are on the same I2C bus. Many slave devices require configuration upon startup to set the behavior of the device. This is typically done when the master accesses the internal register maps of the slave, which have unique register addresses. A device can have one or multiple registers where data is stored, written, or read. The physical I2C interface consists of the serial clock (SCL) and serial data (SDA) lines. Both SDA and SCL lines must be connected to VCC through a pull-up resistor. The size of the pull-up resistor is determined by the amount of capacitance on the I2C lines (for further details, refer to I2C Pull-up Resistor Calculation (SLVA689). Data transfer may be initiated only when the bus is idle. A bus is considered idle if both SDA and SCL lines are high after a STOP condition.
For more information on I2C bus operation, refer to Understanding the I2C Bus (SLVA704).
Figure 1 illustrates a typical I2C bus for an embedded system where multiple slave devices are used. The microcontroller represents the I2C master, and controls the IO expanders, various sensors, EEPROM, ADCs/DACs, and much more, all of which are controlled with only two pins from the master.
I2C I/O expanders are devices used when there is a lack of inputs and outputs on a processor or controller. TI offers a wide variety of I2C-controlled I/O expanders ranging from 4-bit devices to 24-bit devices.
A common issue in applications involving microcontrollers and microprocessors involves the need for additional inputs and outputs. As inputs and outputs are needed more in applications to enable devices, monitor interrupts, and toggle resets, I/Os are beginning to be seen as a premium in master devices. However, with the development of I/O expanders, TI is creating the potential for cost-savings in applications that do not need higher end processors with extra GPIOs. For example, an application using the MSP430G22230, a microcontroller with 4 available GPIOs, could be paired with the TCA9555 GPIO expander in order to have 16 extra GPIOs available to support all application requirements.
The use of I/O expanders in an application can range from controlling or enabling switches, enabling other devices within a system (that is, DC/DC with an EN pin), resetting other devices via RESET pin, or even monitoring status outputs (see Figure 2). TI offers a wide variety of I/O expanders in its portfolio; however, narrowing down the I/O expander that best fits an application need can be confusing, based on the features that each I/O expander has.
Designing systems with I/O expanders allows for more control when there is a lack of input and output pins provided on a processor. TI offers I/O expanders with added features, such as extra address pins for several unique slave addresses, reset pins, and internal pull-ups.