TLV342

現行

雙路、5.5-V、2.2-MHz 運算放大器

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OPA2310 現行 雙通道、5.5-V、3-MHz 高輸出電流 (150-mA) 快速關機 (1-μs) 運算放大器 Higher output current (150mA), better accuracy (1.4mV Vos max), rail-to-rail inputs and outputs

產品詳細資料

Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.5 Rail-to-rail Out GBW (typ) (MHz) 2.2 Slew rate (typ) (V/µs) 0.9 Vos (offset voltage at 25°C) (max) (mV) 4 Iq per channel (typ) (mA) 0.07 Vn at 1 kHz (typ) (nV√Hz) 33 Rating Catalog Operating temperature range (°C) -40 to 125 Offset drift (typ) (µV/°C) 1.9 Features Small Size Input bias current (max) (pA) 200 CMRR (typ) (dB) 90 Iout (typ) (A) 0.113 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.2 Input common mode headroom (to positive supply) (typ) (V) -0.5 Output swing headroom (to negative supply) (typ) (V) 0.018 Output swing headroom (to positive supply) (typ) (V) -0.07
Number of channels 2 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.5 Rail-to-rail Out GBW (typ) (MHz) 2.2 Slew rate (typ) (V/µs) 0.9 Vos (offset voltage at 25°C) (max) (mV) 4 Iq per channel (typ) (mA) 0.07 Vn at 1 kHz (typ) (nV√Hz) 33 Rating Catalog Operating temperature range (°C) -40 to 125 Offset drift (typ) (µV/°C) 1.9 Features Small Size Input bias current (max) (pA) 200 CMRR (typ) (dB) 90 Iout (typ) (A) 0.113 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.2 Input common mode headroom (to positive supply) (typ) (V) -0.5 Output swing headroom (to negative supply) (typ) (V) 0.018 Output swing headroom (to positive supply) (typ) (V) -0.07
SOIC (D) 8 29.4 mm² 4.9 x 6 VSSOP (DGK) 8 14.7 mm² 3 x 4.9 X2QFN (RUG) 10 3 mm² 1.5 x 2
  • 1.8-V and 5-V Performance
  • Low Offset (A Grade)
    • 1.25 mV Maximum (25°C)
    • 1.7 mV Maximum (–40°C to 125°C)
  • Rail-to-Rail Output Swing
  • Wide Common-Mode Input Voltage Range: –0.2 V
    to (V+ – 0.5 V)
  • Input Bias Current: 1 pA (Typical)
  • Input Offset Voltage: 0.3 mV (Typical)
  • Low Supply Current: 70 µA/Channel
  • Low Shutdown Current:
    10 pA (Typical) Per Channel
  • Gain Bandwidth: 2.3 MHz (Typical)
  • Slew Rate: 0.9 V/µs (Typical)
  • Turnon Time From Shutdown: 5 µs (Typical)
  • Input Referred Voltage Noise (at 10 kHz):
    20 nV/√Hz
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (HBM)
    • 750-V Charged-device model (CDM)
  • 1.8-V and 5-V Performance
  • Low Offset (A Grade)
    • 1.25 mV Maximum (25°C)
    • 1.7 mV Maximum (–40°C to 125°C)
  • Rail-to-Rail Output Swing
  • Wide Common-Mode Input Voltage Range: –0.2 V
    to (V+ – 0.5 V)
  • Input Bias Current: 1 pA (Typical)
  • Input Offset Voltage: 0.3 mV (Typical)
  • Low Supply Current: 70 µA/Channel
  • Low Shutdown Current:
    10 pA (Typical) Per Channel
  • Gain Bandwidth: 2.3 MHz (Typical)
  • Slew Rate: 0.9 V/µs (Typical)
  • Turnon Time From Shutdown: 5 µs (Typical)
  • Input Referred Voltage Noise (at 10 kHz):
    20 nV/√Hz
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (HBM)
    • 750-V Charged-device model (CDM)

The TLV34xx devices are single and dual CMOS operational amplifiers, respectively, with low-voltage, low-power, and rail-to-rail output swing capabilities. The PMOS input stage offers an ultra-low input bias current of 1 pA (typical) and an offset voltage of
0.3 mV (typical). For applications requiring excellent dc precision, the A grade (TLV34xA) has a low offset voltage of 1.25 mV (maximum) at 25°C.

These single-supply amplifiers are designed specifically for ultra-low-voltage (1.5 V to 5 V) operation, with a common-mode input voltage range that typically extends from –0.2 V to 0.5 V from the positive supply rail.

The TLV341 (single) and TLV342 (dual) in the RUG package also offer a shutdown (SHDN) pin that can be used to disable the device. In shutdown mode, the supply current is reduced to 45 pA (typical). Offered in both the SOT-23 and smaller SC70 packages, the TLV341 is suitable for the most space-constrained applications. The dual TLV342 is offered in the standard SOIC, VSSOP, and X2QFN packages.

An extended industrial temperature range from –40°C to 125°C makes the TLV34xx suitable in a wide variety of commercial and industrial applications.

The TLV34xx devices are single and dual CMOS operational amplifiers, respectively, with low-voltage, low-power, and rail-to-rail output swing capabilities. The PMOS input stage offers an ultra-low input bias current of 1 pA (typical) and an offset voltage of
0.3 mV (typical). For applications requiring excellent dc precision, the A grade (TLV34xA) has a low offset voltage of 1.25 mV (maximum) at 25°C.

These single-supply amplifiers are designed specifically for ultra-low-voltage (1.5 V to 5 V) operation, with a common-mode input voltage range that typically extends from –0.2 V to 0.5 V from the positive supply rail.

The TLV341 (single) and TLV342 (dual) in the RUG package also offer a shutdown (SHDN) pin that can be used to disable the device. In shutdown mode, the supply current is reduced to 45 pA (typical). Offered in both the SOT-23 and smaller SC70 packages, the TLV341 is suitable for the most space-constrained applications. The dual TLV342 is offered in the standard SOIC, VSSOP, and X2QFN packages.

An extended industrial temperature range from –40°C to 125°C makes the TLV34xx suitable in a wide variety of commercial and industrial applications.

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類型 標題 日期
* Data sheet TLV34xx Low-Voltage Rail-to-Rail Output CMOS Operational Amplifiers With Shutdown datasheet (Rev. D) PDF | HTML 2016年 4月 29日
Application note Op Amp ESD Protection Structures (Rev. A) PDF | HTML 2023年 1月 24日
User guide SMALL-AMP-DIP Evaluation Module (EVM) (Rev. A) 2021年 7月 30日
Application note Conditioning a Switch-mode Power Supply Current Signal Using TI Op Amps (Rev. A) PDF | HTML 2021年 6月 11日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日
Application note Use of Rail-to-Rail Operational Amplifiers (Rev. A) 1999年 12月 22日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

AMP-PDK-EVM — 放大器性能開發套件評估模組

放大器性能開發套件 (PDK) 是一款評估模組 (EVM) 套件,可測試通用運算放大器 (op amp) 參數,並與大多數運算放大器和比較器相容。EVM 套件提供主板和多個插槽式子卡選項,可滿足封裝需求,使工程師能夠快速評估和驗證裝置性能。

AMP-PDK-EVM 套件支援五種最熱門的業界標準封裝,包括:

  • D (SOIC-8 和 SOIC-14)
  • PW (TSSOP-14)
  • DGK (VSSOP-8)
  • DBV (SOT23-5 和 SOT23-6)
  • DCK (SC70-5 和 SC70-6)
使用指南: PDF | HTML
開發板

DIP-ADAPTER-EVM — DIP 轉接器評估模組

Speed up your op amp prototyping and testing with the DIP-Adapter-EVM, which provides a fast, easy and inexpensive way to interface with small, surface-mount ICs. You can connect any supported op amp using the included Samtec terminal strips or wire them directly to existing circuits.

The (...)

使用指南: PDF
TI.com 無法提供
開發板

SMALL-AMP-DIP-EVM — 適用於採用小尺寸封裝之運算放大器的評估模組

SMALL-AMP-DIP-EVM 提供快速簡易方式,與許多業界標準小型封裝進行介接,因而加速小型封裝運算放大器原型設計。SMALL-AMP-DIP-EVM 支援八個小型封裝選項,包括 DPW-5 (X2SON)、DSG-8 (WSON)、DCN-8 (SOT)、DDF-8 (SOT)、RUG-10 (X2QFN)、RUC-14 (X2QFN)、RGY-14 (VQFN) 和 RTE-16 (WQFN)。

使用指南: PDF
TI.com 無法提供
模擬型號

TLV342 PSpice Model (Rev. D)

SLOM136D.ZIP (22 KB) - PSpice Model
模擬型號

TLV342 TINA-TI Reference Design (Rev. B)

SLOM135B.ZIP (17 KB) - TINA-TI Reference Design
模擬型號

TLV342 TINA-TI Spice Model (Rev. B)

SLOM134B.ZIP (4 KB) - TINA-TI Spice Model
計算工具

ANALOG-ENGINEER-CALC — 類比工程師計算機

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
設計工具

CIRCUIT060013 — 具有 T 網路回饋電路的反相放大器

此設計可反轉輸入訊號 VIN,並使用 1000 V/V 或 60 dB 訊號增益。具有 T 回饋網路的反相放大器可在沒有較小 R4 值或超大回饋電阻器值的情況下獲得高增益。
設計工具

CIRCUIT060015 — 可調式參考電壓電路

此電路結合反相及非反相放大器,讓參考電壓可從負輸入電壓向上調整至輸入電壓。可加入增益以提高最大負參考位準。
設計工具

CIRCUIT060074 — 具有比較器電路的高壓側電流感測

此高壓側電流感測解決方案使用一個具有軌對軌輸入共模範圍的比較器,若負載電流上升到 1 A 以上,便在比較器輸出 (COMP OUT) 建立過電流警示 (OC 警示) 訊號。此實作中的 OC 訊號為低電位作動。因此當超過 1-A 閾值時,比較器輸出會變低。實作磁滯後會在負載電流降低至 0.5 A (減少 50%) 時,讓 OC-Alert 返回邏輯高狀態。此電路利用開漏輸出比較器,為控制數位邏輯輸入針腳而進行電平轉換輸出高邏輯電平。對於需要驅動 MOSFET 開關閘極的應用,建議使用具推挽輸出的比較器。
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (D) 8 Ultra Librarian
VSSOP (DGK) 8 Ultra Librarian
X2QFN (RUG) 10 Ultra Librarian

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內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

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