TPS659039-Q1

現行

適用於 ARM Cortex-A15 處理器的汽車 3.135-V 至 5.25-V、7 降壓和 6-LDO PMIC

產品詳細資料

Processor supplier Texas Instruments Processor name Sitara AM57x Regulated outputs (#) 13 Step-down DC/DC converter 7 Step-up DC/DC converter 0 LDO 6 Vin (min) (V) 3.135 Vin (max) (V) 5.25 Vout (min) (V) 0.5 Vout (max) (V) 3.3 Iout (max) (A) 6 Configurability Factory programmable, Software configurable Features Comm control, Power good, Power sequencing Rating Automotive Operating temperature range (°C) -40 to 85 Step-down DC/DC controller 0 Step-up DC/DC controller 0 Iq (typ) (mA) 0.15 Switching frequency (max) (kHz) 2700 Shutdown current (ISD) (typ) (µA) 20 Switching frequency (typ) (kHz) 2200 Product type Processor and FPGA
Processor supplier Texas Instruments Processor name Sitara AM57x Regulated outputs (#) 13 Step-down DC/DC converter 7 Step-up DC/DC converter 0 LDO 6 Vin (min) (V) 3.135 Vin (max) (V) 5.25 Vout (min) (V) 0.5 Vout (max) (V) 3.3 Iout (max) (A) 6 Configurability Factory programmable, Software configurable Features Comm control, Power good, Power sequencing Rating Automotive Operating temperature range (°C) -40 to 85 Step-down DC/DC controller 0 Step-up DC/DC controller 0 Iq (typ) (mA) 0.15 Switching frequency (max) (kHz) 2700 Shutdown current (ISD) (typ) (µA) 20 Switching frequency (typ) (kHz) 2200 Product type Processor and FPGA
NFBGA (ZWS) 169 144 mm² 12 x 12
  • Qualified for Automotive Applications
    • AEC-Q100 Qualified With the Following Results:
      • Temperature Grade 3: –40°C to 85°C
      • ESD Classification:
        • HBM Level 2
        • CDM Level C3
      • Latch-Up Classification:
        • Level IIB for I2C and SPI Terminals
        • Level IIA for all other Terminals
  • Seven Step-Down Switched-Mode Power Supply (SMPS) Regulators:
    • One 0.7 to 1.65 V at 6 A (10-mV Steps)
      • Dual-Phase Configuration With Digital Voltage Scaling (DVS) Control
    • One 0.7 to 1.65 V at 4 A (10-mV Steps)
      • Dual-Phase Configuration With DVS Control
    • One 0.7 to 3.3 V at 3 A (10 or 20-mV Steps)
      • Single-Phase Configuration
      • This Regulator can be Combined With the 6 A Resulting in a 9 A Triple-Phase Regulator (DVS Controlled)
    • Two 0.7 to 3.3 V at 2 A (10 or 20-mV Steps)
      • Single-Phase Configuration
      • One Regulator With DVS Control, Which can also be Configured as a 3-A Regulator
    • Two 0.7 to 3.3 V at 1 A (10 or 20-mV Steps)
      • Single-Phase Configuration
      • One Regulator With DVS Control
    • Output Current Measurement in All Except 1-A SMPS Regulators
    • Differential Remote Sensing (Output and Ground) in Dual-Phase and Triple-Phase Regulators
    • Hardware and Software-Controlled ECO-mode™ up to 5 mA with 15-µA Quiescent Current
    • Short-Circuit Protection
    • Powergood Indication (Voltage and Overcurrent Indication)
    • Internal Soft-Start for In-Rush Current Limitation
    • Ability to synchronize SMPS to External Clock or Internal Fallback Clock With Phase Synchronization
  • Eleven General-Purpose Low Dropout (LDO) Regulators (50-mV Steps):
    • Four 0.9 to 3.3 V at 300 mA With Preregulated Supply
    • Four 0.9 to 3.3 V at 200 mA With Preregulated Supply
    • One 0.9 to 3.3 V at 50 mA With Preregulated Supply
    • One 100-mA USB LDO
    • One Low-Noise LDO 0.9 to 3.3 V up to 100 mA (Low Noise Performance up to 50 mA)
    • Two Additional LDOs for PMU Internal Use
    • Short-Circuit Protection
  • Clock Management 16-MHz Crystal Oscillator and 32-kHz RC Oscillator
    • One Buffered 32-kHz Output
  • Real-Time Clock (RTC) With Alarm Wake-Up Mechanism
  • 12-bit Sigma-Delta General-Purpose Analog-to-Digital-Converter (GPADC) With Three External Input Channels and Six Internal Channels for Self Monitoring
  • Thermal Monitoring
    • High Temperature Warning
    • Thermal Shutdown
  • Control
    • Configurable Power-Up and Power-Down Sequences (One-Time Programmable [OTP])
    • Configurable Sequences Between the SLEEP and ACTIVE States (OTP Programmable)
    • One Dedicated Digital Output Signal (REGEN) that can be Included in the Start-up Sequence
    • Three Digital Output Signals MUXed With GPIO that can be Included in the Start-up Sequence
    • Selectable Control Interface
      • One Serial Peripheral Interface (SPI) for Resource Configurations and DVS Control
      • Two I2C Interfaces. One Dedicated for DVS Control, and a General Purpose I2C Interface for Resource Configuration and DVS Control
  • Undervoltage Lockout
  • System Voltage Range from 3.135 to 5.25 V
  • Package Options
    • 12-mm × 12-mm 169-pin nFBGA with 0,8-mm Ball Pitch
  • Qualified for Automotive Applications
    • AEC-Q100 Qualified With the Following Results:
      • Temperature Grade 3: –40°C to 85°C
      • ESD Classification:
        • HBM Level 2
        • CDM Level C3
      • Latch-Up Classification:
        • Level IIB for I2C and SPI Terminals
        • Level IIA for all other Terminals
  • Seven Step-Down Switched-Mode Power Supply (SMPS) Regulators:
    • One 0.7 to 1.65 V at 6 A (10-mV Steps)
      • Dual-Phase Configuration With Digital Voltage Scaling (DVS) Control
    • One 0.7 to 1.65 V at 4 A (10-mV Steps)
      • Dual-Phase Configuration With DVS Control
    • One 0.7 to 3.3 V at 3 A (10 or 20-mV Steps)
      • Single-Phase Configuration
      • This Regulator can be Combined With the 6 A Resulting in a 9 A Triple-Phase Regulator (DVS Controlled)
    • Two 0.7 to 3.3 V at 2 A (10 or 20-mV Steps)
      • Single-Phase Configuration
      • One Regulator With DVS Control, Which can also be Configured as a 3-A Regulator
    • Two 0.7 to 3.3 V at 1 A (10 or 20-mV Steps)
      • Single-Phase Configuration
      • One Regulator With DVS Control
    • Output Current Measurement in All Except 1-A SMPS Regulators
    • Differential Remote Sensing (Output and Ground) in Dual-Phase and Triple-Phase Regulators
    • Hardware and Software-Controlled ECO-mode™ up to 5 mA with 15-µA Quiescent Current
    • Short-Circuit Protection
    • Powergood Indication (Voltage and Overcurrent Indication)
    • Internal Soft-Start for In-Rush Current Limitation
    • Ability to synchronize SMPS to External Clock or Internal Fallback Clock With Phase Synchronization
  • Eleven General-Purpose Low Dropout (LDO) Regulators (50-mV Steps):
    • Four 0.9 to 3.3 V at 300 mA With Preregulated Supply
    • Four 0.9 to 3.3 V at 200 mA With Preregulated Supply
    • One 0.9 to 3.3 V at 50 mA With Preregulated Supply
    • One 100-mA USB LDO
    • One Low-Noise LDO 0.9 to 3.3 V up to 100 mA (Low Noise Performance up to 50 mA)
    • Two Additional LDOs for PMU Internal Use
    • Short-Circuit Protection
  • Clock Management 16-MHz Crystal Oscillator and 32-kHz RC Oscillator
    • One Buffered 32-kHz Output
  • Real-Time Clock (RTC) With Alarm Wake-Up Mechanism
  • 12-bit Sigma-Delta General-Purpose Analog-to-Digital-Converter (GPADC) With Three External Input Channels and Six Internal Channels for Self Monitoring
  • Thermal Monitoring
    • High Temperature Warning
    • Thermal Shutdown
  • Control
    • Configurable Power-Up and Power-Down Sequences (One-Time Programmable [OTP])
    • Configurable Sequences Between the SLEEP and ACTIVE States (OTP Programmable)
    • One Dedicated Digital Output Signal (REGEN) that can be Included in the Start-up Sequence
    • Three Digital Output Signals MUXed With GPIO that can be Included in the Start-up Sequence
    • Selectable Control Interface
      • One Serial Peripheral Interface (SPI) for Resource Configurations and DVS Control
      • Two I2C Interfaces. One Dedicated for DVS Control, and a General Purpose I2C Interface for Resource Configuration and DVS Control
  • Undervoltage Lockout
  • System Voltage Range from 3.135 to 5.25 V
  • Package Options
    • 12-mm × 12-mm 169-pin nFBGA with 0,8-mm Ball Pitch

The TPS659038-Q1 and TPS659039-Q1 devices are integrated power-management integrated circuits (PMICs) for automotive applications. The device provides seven configurable step-down converters with up to 6 A of output current for memory, processor core, input-output (I/O), or preregulation of LDOs. One of these configurable step-down converters can be combined with another 3-A regulator to allow up to 9 A of output current. All of the step-down converters can synchronize to an external clock source between 1.7 Mhz and 2.7 MHz, or an internal fall back clock at 2.2 MHz. The TPS659038-Q1 device contains 11 LDO regulators while the TPS659039-Q1 device contains six LDO regulators for external use. These LDO regulators can be supplied from either a system supply or a preregulated supply. The power-up and power-down controller is configurable and supports any power-up and power-down sequences (OTP based). The TPS659038-Q1 and TPS659039-Q1 devices include a 32-kHz RC oscillator to sequence all resources during power up and power down. In cases where a fast start up is needed, a 16-MHz crystal oscillator is also included to quickly generate a stable 32-kHz for the system. All LDOs and SMPS converters can be controlled by the SPI or I2C interface, or by power request signals. In addition, voltage scaling registers allow transitioning the SMPS to different voltages by SPI, I2C, or roof and floor control. One dedicated pin in each package can be configured as part of the power-up sequence to control external resources. General-purpose input-output (GPIO) functionality is available and two GPIOs can be configured as part of the power-up sequence to control external resources. Power request signals enable power mode control for power optimization. The device includes a general-purpose (GP) sigma-delta analog-to-digital converter (ADC) with three external input channels. The TPS659038-Q1 and TPS659039-Q1 device is available in a 13-ball × 13-ball nFBGA package with a 0,8-mm pitch.

The TPS659038-Q1 and TPS659039-Q1 devices are integrated power-management integrated circuits (PMICs) for automotive applications. The device provides seven configurable step-down converters with up to 6 A of output current for memory, processor core, input-output (I/O), or preregulation of LDOs. One of these configurable step-down converters can be combined with another 3-A regulator to allow up to 9 A of output current. All of the step-down converters can synchronize to an external clock source between 1.7 Mhz and 2.7 MHz, or an internal fall back clock at 2.2 MHz. The TPS659038-Q1 device contains 11 LDO regulators while the TPS659039-Q1 device contains six LDO regulators for external use. These LDO regulators can be supplied from either a system supply or a preregulated supply. The power-up and power-down controller is configurable and supports any power-up and power-down sequences (OTP based). The TPS659038-Q1 and TPS659039-Q1 devices include a 32-kHz RC oscillator to sequence all resources during power up and power down. In cases where a fast start up is needed, a 16-MHz crystal oscillator is also included to quickly generate a stable 32-kHz for the system. All LDOs and SMPS converters can be controlled by the SPI or I2C interface, or by power request signals. In addition, voltage scaling registers allow transitioning the SMPS to different voltages by SPI, I2C, or roof and floor control. One dedicated pin in each package can be configured as part of the power-up sequence to control external resources. General-purpose input-output (GPIO) functionality is available and two GPIOs can be configured as part of the power-up sequence to control external resources. Power request signals enable power mode control for power optimization. The device includes a general-purpose (GP) sigma-delta analog-to-digital converter (ADC) with three external input channels. The TPS659038-Q1 and TPS659039-Q1 device is available in a 13-ball × 13-ball nFBGA package with a 0,8-mm pitch.

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類型 標題 日期
* Data sheet TPS65903x-Q1 Automotive Power Management Unit (PMU) for Processor datasheet (Rev. L) PDF | HTML 2019年 2月 6日
* User guide TPS659038-Q1 and TPS659039-Q1 Register Map (Rev. B) 2019年 2月 13日
Application note POR Generation in TPS65903x, TPS65917-Q1, TPS65919-Q1, and TPS65916 Devices (Rev. A) 2018年 9月 21日
User guide TPS659039-Q1 User’s Guide to Power DRA74x, DRA75x, TDA2x, and AM572x (Rev. C) 2018年 5月 7日
Application note Guide to Using the GPADC in TPS65903x, TPS65917-Q1, TPS65919-Q1, and TPS65916 de (Rev. A) 2017年 12月 13日
Application note How to power up the TPS659038-Q1 and TPS659039-Q1 (Rev. A) 2017年 3月 15日
EVM User's guide TPS659038-Q1 and TPS659039-Q1 EVM User's Guide (Rev. A) 2017年 3月 15日
Application note TPS659038-Q1 and TPS659039-Q1 Operation With Higher Capacitive Loading (Rev. A) 2017年 3月 15日
White paper Power Management IC (PMIC) Guide for Automotive (Rev. A) 2014年 10月 29日
Application note Adaptive (Dynamic) Voltage (Frequency) Scaling – Motivation and Implementations 2014年 3月 28日

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The MMWCAS-DSP evaluation module (EVM) design provides a processing foundation for a cascaded imaging radar system. Cascade radar devices can support front, long-range radar (LRR), beamforming applications, as well as corner- and side-cascade radar and sensor fusion systems. This EVM design (...)

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SWCC014 TPS659038-Q1 and TPS659039-Q1 Design Checklist

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產品
多通道 IC (PMIC)
TPS659038-Q1 適用 ARM Cortex-A15 處理器的車用 3.135-V 至 5.25-V、7 降壓和 11-LDO PMIC TPS659039-Q1 適用於 ARM Cortex-A15 處理器的汽車 3.135-V 至 5.25-V、7 降壓和 6-LDO PMIC
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TPS659039-Q1 Unencrypted PSpice Transient Model Package (Rev. A)

SLVMAF9A.ZIP (878 KB) - PSpice Model
參考設計

TIDEP-01017 — 使用 Jacinto™ ADAS 處理器的串級成像雷達擷取參考設計

This reference design provides a processing foundation for a cascaded imaging radar system. Cascade radar devices can support front, long-range (LRR) beam-forming applications as well as corner- and side-cascade radar and sensor fusion systems. This reference design provides qualified developers (...)
Design guide: PDF
電路圖: PDF
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TIDA-00801 — 車用無電池資訊娛樂系統處理器電源參考設計

The TIDA-00801 reference design is a full off-battery to point of load power solution supporting input voltages as low as 2V.  It uses the Boost plus Buck DC/DC regulator TPS43330A-Q1 supporting an  input voltage range of  2V to 40V and allowing the design to support not only (...)
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NFBGA (ZWS) 169 Ultra Librarian

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