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Parametric measurement unit (PMU)

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Block diagram

Parametric measurement unit (PMU)

Block diagram

Overview

Our integrated circuits and reference designs help you create high-accuracy parametric measurement unit (PMU) designs at wafer, package and board levels enabling dense solutions for a high number of channels while minimizing channel-to-channel variation.

Design requirements

Next-generation PMU designs often require:

  • Highest levels of speed and accuracy through data acquisition channels.
  • Tight temperature controls to minimize measurement drift.
  • Precise reference voltage generation to improve measurement accuracy.
  • Low jitter clock distribution to maximize signal-to-noise ratio (SNR) performance.
  • Highly-integrated, low-height power modules minimizing board-to-board spacing.
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Block diagram

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Parametric measurement unit (PMU)

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Technical documentation

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Type Title Date
Application brief Precision ADC for Measuring Analog Outputs of Parametric Measurement Unit (PMU) (Rev. B) PDF | HTML 14 Jan 2025
Application brief Pairing up Op Amp and Buffer for Higher Output Power Plus Speed in ATE 11 May 2022
Application brief How to Select Precision Amplifiers for Semiconductor Testers (Rev. A) PDF | HTML 08 May 2022
Application note When to Replace a Relay With a Multiplexer (Rev. A) PDF | HTML 07 Jun 2024
Application brief Solving Power Design Challenges in Semiconductor Test and ATE Applications PDF | HTML 02 Aug 2024

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