This reference design features two LMG352XR0X0 650-V GaN FETs with an integrated driver and protection in a half-bridge configuration with all the required bias circuit and logic or power level shifting. Power stage, gate-driving, high-frequency current loops are fully enclosed on the board to minimize power loop parasitic inductance for reducing voltage overshoot and improving performance. This design is configured for a socket style external connection for easy interface with external power stages to run the LMG352XR0X0 in various applications.
| Output voltage options | PMP23249.1 |
|---|---|
| Vin (Min) (V) | 300 |
| Vin (Max) (V) | 650 |
| Vout (Nom) (V) | 380 |
| Iout (Max) (A) | 9.4 |
| Output Power (W) | 3572 |
| Isolated/Non-Isolated | Non-Isolated |
| Input Type | DC |
| Topology | Other |
A fully assembled board has been developed for testing and performance validation only, and is not available for sale.
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Test results for the reference design, including efficiency graphs, test prerequisites and more
Detailed schematic diagram for design layout and components
Complete listing of design components, reference designators, and manufacturers/part numbers
Detailed overview of design layout for component placement
Files used for 3D models or 2D drawings of IC components
Design file that contains information on physical board layer of design PCB
PCB layer plot file used for generating PCB design layout
Includes TI products in the design and potential alternatives.
| Type | Title | Date | ||
|---|---|---|---|---|
| Test report | Compact LMG3522R030-Q1 650-V, 30-mΩ, Half-Bridge Daughter Card Reference Design | PDF | HTML | Oct. 20, 2022 |
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