SBAS771D June 2017 – October 2024 AMC1303E0510 , AMC1303E0520 , AMC1303E2510 , AMC1303E2520 , AMC1303M0510 , AMC1303M0520 , AMC1303M2510 , AMC1303M2520
PRODUCTION DATA
A differential input signal of 0V ideally produces a stream of ones and zeros that are high 50% of the time. A differential input of 250mV (for the AMC1303x25x) or 50 mV (for the AMC1303x05x) produces a stream of ones and zeros that are high 89.06% of the time. With 16 bits of resolution on the decimation filter, that percentage ideally corresponds to code 58368. A differential input of –250mV (–50mV for the AMC1303x05x) produces a stream of ones and zeros that are high 10.94% of the time and ideally results in code 7168 with a 16-bit resolution decimation filter. These input voltages are also the specified linear ranges of the different AMC1303 versions with performance as specified in this document. If the input voltage value exceeds these ranges, the output of the modulator shows nonlinear behavior where the quantization noise increases. The output of the modulator clips with a stream of only zeros with an input less than or equal to –320mV (–64mV for the AMC1303x05x) or with a stream of only ones with an input greater than or equal to 320mV (64mV for the AMC1303x05x). In this case, however, the AMC1303 generates a single 1 (if the input is at negative full-scale) or 0 every 128 clock cycles to indicate proper device function (see the Fail-Safe Output section for more details). Figure 7-5 shows the input voltage versus the output modulator signal.
Equation 1 calculates the density of ones in the output bitstream for any input voltage value (with the exception of a full-scale input signal, as described in the Section 7.4.2 section):
The AMC1303 internally generates the clock signal required for the modulator. This clock is provided externally at the CLKOUT pin on AMC1303Mx devices only. For more details, see the Switching Characteristics section.