SBAS771D June 2017 – October 2024 AMC1303E0510 , AMC1303E0520 , AMC1303E2510 , AMC1303E2520 , AMC1303M0510 , AMC1303M0520 , AMC1303M2510 , AMC1303M2520
PRODUCTION DATA
The modulator generates a bitstream that is processed by a digital filter to obtain a digital word similar to a conversion result of a conventional analog-to-digital converter (ADC). A very simple filter, shown in Equation 2, built with minimal effort and hardware, is a sinc3-type filter:
This filter provides the best output performance at the lowest hardware size (count of digital gates) for a second-order modulator. All the characterization in this document is done with a sinc3 filter with an oversampling ratio (OSR) of 256 and an output word size of 16 bits.
The effective number of bits (ENOB) is often used to compare the performance of ADCs and ΔΣ modulators. Figure 8-1 shows the ENOB of the AMC1303 with different oversampling ratios. In this document, Equation 3 calculates this number from the SINAD by using the following equation:
An example code for implementing a sinc3 filter in an FPGA is discussed the Combining ADS1202 with FPGA Digital Filter for Current Measurement in Motor Control Applications application note, available for download at www.ti.com.