SBAS961A May 2019 – April 2020 TLA2528
PRODUCTION DATA.
Table 11 lists the TLA2528 registers. All register offset addresses not listed in Table 11 should be considered as reserved locations and the register contents should not be modified.
Address | Acronym | Register Name | Section |
---|---|---|---|
0x0 | SYSTEM_STATUS | SYSTEM_STATUS Register (Address = 0x0) [reset = 0x80] | |
0x1 | GENERAL_CFG | GENERAL_CFG Register (Address = 0x1) [reset = 0x0] | |
0x2 | DATA_CFG | DATA_CFG Register (Address = 0x2) [reset = 0x0] | |
0x3 | OSR_CFG | OSR_CFG Register (Address = 0x3) [reset = 0x0] | |
0x4 | OPMODE_CFG | OPMODE_CFG Register (Address = 0x4) [reset = 0x0] | |
0x5 | PIN_CFG | PIN_CFG Register (Address = 0x5) [reset = 0x0] | |
0x7 | GPIO_CFG | GPIO_CFG Register (Address = 0x7) [reset = 0x0] | |
0x9 | GPO_DRIVE_CFG | GPO_DRIVE_CFG Register (Address = 0x9) [reset = 0x0] | |
0xB | GPO_VALUE | GPO_VALUE Register (Address = 0xB) [reset = 0x0] | |
0xD | GPI_VALUE | GPI_VALUE Register (Address = 0xD) [reset = 0x0] | |
0x10 | SEQUENCE_CFG | SEQUENCE_CFG Register (Address = 0x10) [reset = 0x0] | |
0x11 | CHANNEL_SEL | CHANNEL_SEL Register (Address = 0x11) [reset = 0x0] | |
0x12 | AUTO_SEQ_CH_SEL | AUTO_SEQ_CH_SEL Register (Address = 0x12) [reset = 0x0] |
Complex bit access types are encoded to fit into small table cells. Table 12 shows the codes that are used for access types in this section.
Access Type | Code | Description |
---|---|---|
Read Type | ||
R | R | Read |
Write Type | ||
W | W | Write |
Reset or Default Value | ||
-n | Value after reset or the default value | |
Register Array Variables | ||
i,j,k,l,m,n | When these variables are used in a register name, an offset, or an address, they refer to the value of a register array where the register is part of a group of repeating registers. The register groups form a hierarchical structure and the array is represented with a formula. | |
y | When this variable is used in a register name, an offset, or an address it refers to the value of a register array. |