SNIS217C december   2020  – may 2023 TMP139

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Timing Diagrams
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power-Up Sequence
      2. 7.3.2 Power-Down and Device Reset
      3. 7.3.3 Temperature Result and Limits
      4. 7.3.4 Bus Reset
      5. 7.3.5 Interrupt Generation
      6. 7.3.6 Parity Error Check
      7. 7.3.7 Packet Error Check
    4. 7.4 Device Functional Modes
      1. 7.4.1 Conversion Mode
      2. 7.4.2 Serial Address
      3. 7.4.3 I2C Mode Operation
        1. 7.4.3.1 Host I2C Write Operation
        2. 7.4.3.2 Host I2C Read Operation
        3. 7.4.3.3 Host I2C Read Operation in Default Read Address Pointer Mode
        4. 7.4.3.4 Switching from I2C Mode to I3C Basic Mode
      4. 7.4.4 I3C Basic Mode Operation
        1. 7.4.4.1 Host I3C Write Operation without PEC
        2. 7.4.4.2 Host I3C Write Operation with PEC
        3. 7.4.4.3 Host I3C Read Operation without PEC
        4. 7.4.4.4 Host I3C Read Operation with PEC
        5. 7.4.4.5 Host I3C Read Operation in Default Read Address Pointer Mode
      5. 7.4.5 In Band Interrupt
        1. 7.4.5.1 In Band Interrupt Arbitration Rules
        2. 7.4.5.2 In Band Interrupt Bus Transaction
      6. 7.4.6 Common Command Codes Support
        1. 7.4.6.1 ENEC CCC
        2. 7.4.6.2 DISEC CCC
        3. 7.4.6.3 RSTDAA CCC
        4. 7.4.6.4 SETAASA CCC
        5. 7.4.6.5 GETSTATUS CCC
        6. 7.4.6.6 DEVCAP CCC
        7. 7.4.6.7 SETHID CCC
        8. 7.4.6.8 DEVCTRL CCC
      7. 7.4.7 I/O Operation
      8. 7.4.8 Timing Diagrams
    5. 7.5 Programming
      1. 7.5.1 Enabling Interrupt Mechanism
      2. 7.5.2 Clearing Interrupt
    6. 7.6 Register Map
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YAH|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.4.6 Common Command Codes Support

The TMP139 supports a subset of the CCC as listed in the I3C basic specification and shown in Table 7-6. Only CCC specified in the JESD302-1 are supported and the TMP139 shall either NACK unsupported CCC (if possible) or ignore the actions when on a generic I3C bus. Similarly, for supported CCC—depending on whether the TMP139 is in I2C or I3C mode—if a non-applicable CCC is sent, the device shall ignore the actions.

The TMP139 requires a Stop condition on the bus after receiving any CCC before it can process a device specific read or write operation. Similarly, when processing a device specific read or write condition, a Stop on the bus should follow before any CCC can be issued.

The TMP139 can receive a direct CCC with a Repeated Start condition after another direct CCC. Similarly, it is valid to send a broadcast CCC following another broadcast CCC with a Repeated Start in between. In such a case, the action taken by the device will only be updated following a Stop condition on the bus. The behavior of TMP139 is not defined if a direct CCC is followed by a broadcast CCC or vice-versa with a Repeated Start. For example, it is a legal combination in I2C mode to send a SETHID CCC, followed by a Repeated Start, then a SETAASA CCC followed by a Stop condition. However, in I3C mode, sending a direct ENEC CCC followed by Repeated Start and then a broadcast DEVCTRL CCC is not a valid condition for the TMP139. The host must issue a Stop after ENEC CCC, before it sends a broadcast DEVCTRL CCC.

The CCC sent to the TMP139 may either be a broadcast code or a direct code. All CCC operations require the host to send 7'h7E with R/W = 0, followed by the CCC and payload bytes specific to the CCC. For a direct CCC, the host shall issue a Repeated Start on the bus after the CCC byte followed by the payload bytes.

Table 7-6 Supported CCC
CCCModeCodeDescriptionApplicable in I2C ModeApplicable in I3C Mode
ENECBroadcast0x00Enable Event InterruptsNoYes
Direct0x80
DISECBroadcast0x01Disable Event InterruptsNoYes
Direct0x81
RSTDAABroadcast0x06Put the device in I2C modeNoYes
SETAASABroadcast0x29Put the device in I3C Basic ModeYesNo
GETSTATUSDirect0x90Get Device StatusNoYes
DEVCAPDirect0xE0Get Device CapabilityNoYes
SETHIDBroadcast0x61TMP139 updates 3-bit HID fieldYesNo
DEVCTRLBroadcast0x62Configure DeviceYesYes