The TPS7H1101A-SP is 3-A, 1.5-V to 7-V LDO linear regulator that uses PMOS pass element configuration.

It uses TI’s proprietary process to achieve low noise, high PSRR combined with high-thermal performance in a 16-pin ceramic flatpack package (HKR).

A number of features are incorporated in the design to provide high reliability and system flexibility. Current foldback, current limit, and thermal protection are incorporated in the design to make it viable for space environments.

The device also has a current sense monitoring feature. A resistor connected from the current sense (CS) terminal to VIN indicates voltage proportional to the output current. Section 8.2.1.3 provides a detailed description of this feature. When CS is pulled high to voltage greater than 90% Vref (0.544 V), foldback current limit is enabled. Pulling CS below 0.544 V disables the foldback current limit.

A resistor connected from the programmable current limit (PCL) terminal to ground sets the overcurrent limit activation point. When overcurrent limit activation point is reached, it results in the LDO going into current foldback mode. Output current is reduced to approximately 50% of the current limit set point. Section 8.2.1.2 provides a detailed description of this feature.

TPS7H1101A-SP incorporates thermal protection, which disables the output when the junction temperature rises to approximately 185°C, allowing the device to cool. Cycling limits the dissipation of the regulator, protecting it from catastrophic damage as a result of overheating.

To provide system flexibility for demanding current needs, the LDO can be configured in parallel operation as indicated in Figure 8-12. Section 8.2.1.6 provides detailed parallel operation information.

An enable feature is incorporated in the design allowing the user to enable or disable the LDO. Power Good (PG), is an open-drain connection, indicating status of the output voltage regulation. These provide the customers system flexibility in monitoring and controlling the LDO operation.