JAJS463D
NOVEMBER 2009 – March 2018
TPS40303
,
TPS40304
,
TPS40305
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
Device Images
アプリケーション概略図
4
改訂履歴
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Voltage Reference
7.3.2
Enable Functionality, Start-Up Sequence and Timing
7.3.3
Soft-Start Time
7.3.4
Oscillator and Frequency Spread Spectrum (FSS)
7.3.5
Overcurrent Protection
7.3.6
Drivers
7.3.7
Prebias Start-Up
7.3.8
Power Good
7.3.9
Thermal Shutdown
7.4
Device Functional Modes
7.4.1
Modes of Operation
7.4.1.1
UVLO
7.4.1.2
Disable
7.4.1.3
Calibration
7.4.1.4
Converting
8
Application and Implementation
8.1
Application Information
8.2
Typical Applications
8.2.1
Using the TPS40305 for a 12-V to 1.8-V Point-of-Load Synchronous Buck Regulator
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.2.1
Custom Design With WEBENCH® Tools
8.2.1.2.2
Selecting the Switching Frequency
8.2.1.2.3
Inductor Selection (L1)
8.2.1.2.4
Output Capacitor Selection (C12)
8.2.1.2.5
Peak Current Rating of Inductor
8.2.1.2.6
Input Capacitor Selection (C8)
8.2.1.2.7
MOSFET Switch Selection (Q1 and Q2)
8.2.1.2.8
Bootstrap Capacitor (C6)
8.2.1.2.9
VDD Bypass Capacitor (C7)
8.2.1.2.10
BP Bypass Capacitor (C5)
8.2.1.2.11
Short-Circuit Protection (R11)
8.2.1.2.12
Feedback Divider (R4, R5)
8.2.1.2.13
Compensation: (C2, C3, C4, R3, R6)
8.2.1.3
Application Curves
8.2.2
A High-Current, Low-Voltage Design Using the TPS40304
8.2.2.1
Design Requirements
8.2.2.2
Detailed Design Procedure
8.2.2.2.1
Selecting the Switching Frequency
8.2.2.2.2
Inductor Selection (L1)
8.2.2.2.3
Output Capacitor Selection (C12)
8.2.2.2.4
Peak Current Rating of Inductor
8.2.2.2.5
Input Capacitor Selection (C8)
8.2.2.2.6
MOSFET Switch Selection (Q1 and Q2)
8.2.2.2.7
Bootstrap Capacitor (C6)
8.2.2.2.8
VDD Bypass Capacitor (C7)
8.2.2.2.9
BP Bypass Capacitor (C5)
8.2.2.2.10
Short-Circuit Protection (R11)
8.2.2.2.11
Feedback Divider (R4, R5)
8.2.2.2.12
Compensation: (C2, C3, C4, R3, R6)
8.2.2.3
Application Curves
8.2.3
A Synchronous Buck Application Using the TPS40303
8.2.3.1
Design Requirements
8.2.3.2
Detailed Design Procedure
8.2.3.2.1
Selecting the Switching Frequency
8.2.3.2.2
Inductor Selection (L1)
8.2.3.2.3
Output Capacitor Selection (C12)
8.2.3.2.4
Peak Current Rating of Inductor
8.2.3.2.5
Input Capacitor Selection (C8)
8.2.3.2.6
MOSFET Switch Selection (Q1 and Q2)
8.2.3.2.7
Bootstrap Capacitor (C6)
8.2.3.2.8
VDD Bypass Capacitor (C7)
8.2.3.2.9
BP Bypass Capacitor (C5)
8.2.3.2.10
Short-Circuit Protection (R11)
8.2.3.2.11
Feedback Divider (R4, R5)
8.2.3.2.12
Compensation: (C2, C3, C4, R3, R6)
8.2.3.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
デバイスおよびドキュメントのサポート
11.1
デバイス・サポート
11.1.1
デベロッパー・ネットワークの製品に関する免責事項
11.2
WEBENCH®ツールによるカスタム設計
11.3
ドキュメントのサポート
11.3.1
関連資料
11.4
関連リンク
11.5
ドキュメントの更新通知を受け取る方法
11.6
コミュニティ・リソース
11.7
商標
11.8
静電気放電に関する注意事項
11.9
Glossary
12
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DRC|10
MPDS117L
サーマルパッド・メカニカル・データ
DRC|10
QFND013N
発注情報
jajs463d_oa
jajs463d_pm
Device Images
アプリケーション概略図