JAJSE62A November   2017  – December 2021 TPS55160-Q1 , TPS55162-Q1 , TPS55165-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 概要 (続き)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics — External Components
    6. 7.6  Electrical Characteristics — Supply Voltage (VINP, VINL pins)
    7. 7.7  Electrical Characteristics — Reference Voltage (VOS_FB Pin) and Output Voltage (VOUT Pin)
    8. 7.8  Electrical Characteristics — Buck-Boost
    9. 7.9  Electrical Characteristics — Undervoltage and Overvoltage Lockout
    10. 7.10 Electrical Characteristics — IGN Wakeup
    11. 7.11 Electrical Characteristics — Logic Pins PS, IGN_PWRL, SS_EN
    12. 7.12 Electrical Characteristics – Overtemperature Protection
    13. 7.13 Electrical Characteristics – Power Good
    14. 7.14 Switching Characteristics — Reference Voltage (VOS_FB Pin) and Output Voltage (VOUT Pin)
    15. 7.15 Switching Characteristics — Buck-Boost
    16. 7.16 Switching Characteristics — Undervoltage and Overvoltage Lockout
    17. 7.17 Switching Characteristics — IGN Wakeup
    18. 7.18 Switching Characteristics — Logic Pins PS, IGN_PWRL, SS_EN
    19. 7.19 Switching Characteristics – Power Good
    20. 7.20 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Spread-Spectrum Feature
      2. 8.3.2 Overcurrent Protection
      3. 8.3.3 Overtemperature Protection
      4. 8.3.4 Undervoltage Lockout and Minimum Start-Up Voltage
      5. 8.3.5 Overvoltage Lockout
      6. 8.3.6 VOUT Overvoltage Protection
      7. 8.3.7 Power-Good Pin
    4. 8.4 Device Functional Modes
      1. 8.4.1 State Diagram
      2. 8.4.2 Modes of Operation
        1. 8.4.2.1 Normal Mode
        2. 8.4.2.2 Low-Power Mode
      3. 8.4.3 Power-Up and Power-Down Sequences
      4. 8.4.4 Soft-Start Feature
      5. 8.4.5 Pulldown Resistor on VOUT
      6. 8.4.6 Output Voltage Selection
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Application Circuits for Output Voltage Configurations
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Power-Circuit Selections: CIN, L, COUT
          1. 9.2.2.1.1 Inductor Current in Step-Down Mode
          2. 9.2.2.1.2 Inductor Current in Step-Up Mode
          3. 9.2.2.1.3 Inductor Current in Buck-Boost Overlap Mode
          4. 9.2.2.1.4 Inductor Peak Current
        2. 9.2.2.2 Control-Circuit Selections
          1. 9.2.2.2.1 Bootstrap Capacitors
          2. 9.2.2.2.2 VOUT-Sense Bypass Capacitor
          3. 9.2.2.2.3 VREG Bypass Capacitor
          4. 9.2.2.2.4 PG Pullup Resistor and Delay Time
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 サポート・リソース
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.2 Overcurrent Protection

The buck-boost regulator has two ways of protecting against overcurrent conditions. When the buck-boost is in regulation (essentially the output voltage is at the target voltage), the average current limit provides the protection against overcurrent conditions. When the average current limit is activated (essentially the maximum inductor average current is reached), the output voltage gradually decreases, but the control loop tries to maintain the target output voltage. So when the overcurrent condition clears before the buck-boost control circuit gets too far out of regulation, the output voltage gradually reaches its target voltage level again.

The buck-boost regulator limits the peak-overcurrent in the power MOSFETs. When such a peak-overcurrent event occurs, the device goes into the PRE_RAMP state and a 12-ms time-out is started. The device restarts and goes from the PRE_RAMP state to the RAMP state after this 12-ms time-out expires and the IGN pin is high.

When the device operates in low-power mode, both the average current limit and the peak-current limit protection functions are disabled.