JAJS385T May   2001  – December 2022 TPS715

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4.     Thermal Information
    5. 6.4 Electrical Characteristics
    6. 6.5 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Wide Supply Range
      2. 7.3.2 Low Quiescent Current
      3. 7.3.3 Dropout Voltage (VDO)
      4. 7.3.4 Current Limit
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1 Setting VOUT for the TPS71501 Adjustable LDO
        2. 8.2.1.2 External Capacitor Requirements
        3. 8.2.1.3 Input and Output Capacitor Requirements
        4. 8.2.1.4 Reverse Current
        5. 8.2.1.5 Feed-Forward Capacitor (CFF)
        6. 8.2.1.6 Power Dissipation (PD)
        7. 8.2.1.7 Estimating Junction Temperature
      2. 8.2.2 Application Curves
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Power Dissipation
      2. 8.5.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Evaluation Module
        2. 9.1.1.2 Spice Models
      2. 9.1.2 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

4 Revision History

Changes from Revision S (August 2022) to Revision T (December 2022)

  • ドキュメントに M3 デバイスの情報 (新チップの情報) を追加Go
  • 「特長」セクションを変更：可変出力電圧オプションを変更、「接合部温度仕様」を「動作時接合部温度」に変更、「特長」の箇条書き項目を並べ替えGo
  • 先頭ページに「静止電流と負荷電流との関係」の曲線を追加Go
  • 「概要」セクションから低消費電力レベルの説明を削除Go
  • 「代表的なアプリケーション回路図」の図を変更 Go
  • Changed Pin Functions table: changed Description column and added footnoteGo
  • Added condition statement and characterization conditions plots to Typical Characteristics sectionGo
  • Changed curve titles in Typical Characteristics section to distinguish between new and legacy chipsGo
  • Changed block diagrams in Functional Block Diagrams sectionGo
  • Changed Low Quiescent Current section and titleGo
  • Deleted thermal shutdown discussion from Current Limit sectionGo
  • Changed third bullet in Normal Operation sectionGo
  • Changed Application Information sectionGo
  • Changed Typical Application sectionGo
  • Changed output operating voltage range from 1.2 V to 15 V to 1.205 V to 15 V in Setting VOUT for the TPS71501 Adjustable LDO Go
  • Added reverse current limit discussion to Reverse Current sectionGo
  • Changed Application Curves section Go
  • Deleted sentence stating This input supply must be well regulated from Power Supply Recommendations sectionGo
  • Changed Example Layout for the TPS71501DCK figureGo
  • Changed Device Nomenclature tableGo

Changes from Revision R (February 2015) to Revision S (August 2022)

  • 文書全体にわたって表、図、相互参照の採番方法を更新Go
  • ドキュメントのタイトルを変更Go
  • 「特長」セクションを変更Go
  • 「アプリケーション」セクションを変更Go
  • 「概要」セクションを変更Go
  • Changed descriptions of FB and NC pins in Pin Functions table, split fixed and adjustable pin outs apart Go
  • Added new chip specific plots to Typical Characteristics sectionGo
  • Changed Overview sectionGo
  • Changed block diagrams in Functional Block Diagrams sectionGo
  • Changed Low Quiescent Current section and titleGo
  • Changed Dropout Voltage (VDO) sectionGo
  • Deleted Disabled row from Device Functional Mode Comparison tableGo
  • Changed Dropout Operation sectionGo
  • Changed External Capacitor Requirements sectionGo
  • Added Input and Output Capacitor Requirements sectionGo
  • Changed Reverse Current sectionGo
  • Changed output voltage value when no CFF is used from 0.8 V to 1.205 V Go
  • Added Power Dissipation (PD) sectionGo
  • Added new chip specific plots to Application Curves sectionGo
  • Added second row and deleted second footnote from Device Nomenclature tableGo