JAJSMH6F July   2021  – August 2024 TPS7H5001-SP , TPS7H5002-SP , TPS7H5003-SP , TPS7H5004-SP

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Device Comparison Table
  6. Device Options
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: All Devices
    6. 7.6  Electrical Characteristics: TPS7H5001-SP
    7. 7.7  Electrical Characteristics: TPS7H5002-SP
    8. 7.8  Electrical Characteristics: TPS7H5003-SP
    9. 7.9  Electrical Characteristics: TPS7H5004-SP
    10. 7.10 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  VIN and VLDO
      2. 8.3.2  Start-Up
      3. 8.3.3  Enable and Undervoltage Lockout (UVLO)
      4. 8.3.4  Voltage Reference
      5. 8.3.5  Error Amplifier
      6. 8.3.6  Output Voltage Programming
      7. 8.3.7  Soft Start (SS)
      8. 8.3.8  Switching Frequency and External Synchronization
        1. 8.3.8.1 Internal Oscillator Mode
        2. 8.3.8.2 External Synchronization Mode
        3. 8.3.8.3 Primary-Secondary Mode
      9. 8.3.9  Primary Switching Outputs (OUTA/OUTB)
      10. 8.3.10 Synchronous Rectifier Outputs (SRA and SRB)
      11. 8.3.11 Dead Time and Leading Edge Blank Time Programmability (PS, SP, and LEB)
      12. 8.3.12 Pulse Skipping
      13. 8.3.13 Duty Cycle Programmability
      14. 8.3.14 Current Sense and PWM Generation (CS_ILIM)
      15. 8.3.15 Hiccup Mode Operation (HICC)
      16. 8.3.16 External Fault Protection (FAULT)
      17. 8.3.17 Slope Compensation (RSC)
      18. 8.3.18 Frequency Compensation
      19. 8.3.19 Thermal Shutdown
    4. 8.4 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Switching Frequency
        2. 9.2.2.2  Output Voltage Programming Resistors
        3. 9.2.2.3  Dead Time
        4. 9.2.2.4  Leading Edge Blank Time
        5. 9.2.2.5  Soft-Start Capacitor
        6. 9.2.2.6  Transformer
        7. 9.2.2.7  Main Switching FETs
        8. 9.2.2.8  Synchronous Rectificier FETs
        9. 9.2.2.9  RCD Clamp
        10. 9.2.2.10 Output Inductor
        11. 9.2.2.11 Output Capacitance and Filter
        12. 9.2.2.12 Sense Resistor
        13. 9.2.2.13 Hiccup Capacitor
        14. 9.2.2.14 Frequency Compensation Components
        15. 9.2.2.15 Slope Compensation Resistor
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • HFT|22
  • KGD|0
  • PW|24
サーマルパッド・メカニカル・データ
発注情報

Overview

The TPS7H500x-SP series is a family of radiation-hardness-assured PWM controllers. Each controller features a voltage reference of 0.613 V with accuracy of +0.7%/-1%. The switching frequency is configurable from 100 kHz to 2 MHz, with external clock synchronization capability. The series consists of the full-featured device TPS7H5001-SP, as well as the three additional specialized controllers TPS7H5002-SP, TPS7H5003-SP, and TPS7H5004-SP.

The TPS7H5001-SP is a radiation-hardness-assured, current mode, dual output PWM controller optimized for silicon (Si) and gallium nitride (GaN) based DC-DC converters in space applications. The switching frequency of the TPS7H5001-SP can be configured from 100 kHz to 2 MHz while still maintaining a very low current consumption, which makes it ideal for fully exploiting the area reduction and high efficiency benefits of GaN based DC-DC converters. The device features integrated synchronous rectifier control outputs and dead-time programmability in order to target high efficiency and high performance topologies. In addition, the TPS7H5001- SP supports single-ended converter topologies by providing the user flexibility to control the maximum duty cycle. The 0.613-V +0.7%/-1% accurate internal reference allows design of high-current buck converters for FPGA core voltages.

The TPS7H5002-SP is a single output radiation-hardness-assured PWM controller that supports buck applications and single ended isolated topologies. The controller contains an integrated synchronous rectification output. Optimized for GaN power semiconductor based applications, the controller has configurable dead time and configurable leading edge blank time. The controller can be configured for maximum duty cycle of 75% or 100%. As such, the DCL pin can be left floating or connected to VLDO. Connection of the DCL pin to AVSS is not permissible for this device.

The TPS7H5003-SP is also a single output radiation-hardness-assured PWM controller that contains an integrated synchronous rectification output. The dead time and leading edge blank time are fixed at 50 ns for this device. The controller can be configured for maximum duty cycle of 75% or 100%. As such, the DCL pin can be left floating or connected to VLDO. Connection of the DCL pin to AVSS is not permissible for this device.

The TPS7H5004-SP is a dual output radiation-hardness-assured PWM controller suited for usage in non-synchronous push-pull and full-bridge topologies. The controller has configurable leading edge blank time. The maximum duty cycle for this device is 50% and the DCL pin must be connected to AVSS.