JAJS204S December   2005  – November 2024 TPS74401

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Enable, Shutdown
      2. 6.3.2 Power-Good (VQFN Package Only)
      3. 6.3.3 Internal Current Limit
      4. 6.3.4 Thermal Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
    5. 6.5 Programming
      1. 6.5.1 Programmable Soft-Start
      2. 6.5.2 Sequencing Requirements
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Input, Output, and Bias Capacitor Requirements
      2. 7.1.2 Transient Response
      3. 7.1.3 Dropout Voltage
      4. 7.1.4 Output Noise
    2. 7.2 Typical Applications
      1. 7.2.1 Setting the TPS74401
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Using an Auxiliary Bias Rail
      3. 7.2.3 Without an Auxiliary Bias
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Power Dissipation
        2. 7.4.1.2 Thermal Considerations
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
      2. 8.1.2 Device Nomenclature
    2. 8.2 Device Support
      1. 8.2.1 Development Support
        1. 8.2.1.1 Evaluation Modules
        2. 8.2.1.2 Spice Models
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

9 Revision History

Changes from Revision R (April 2017) to Revision S (November 2024)

  • ドキュメント全体にわたって表、図、相互参照の採番方法を更新Go
  • ドキュメント全体を通して従来チップと新チップの表記を追加Go
  • 「特長」および「概要」セクションを変更 Go
  • 「製品情報」表を「パッケージ情報」に変更Go
  • Changed Typical Characteristics section: Identified legacy chip plots and added new chip plotsGo
  • Changed Output Noise sectionGo

Changes from Revision Q (April 2015) to Revision R (April 2017)

  • ドキュメントに RGR パッケージを追加Go
  • ドキュメント全体を通して TPS744xx を TPS74401 に変更Go
  • 「パッケージ」の「特長」箇条書き項目を変更 Go
  • 「概要」セクションの 2 番目の段落を変更：RGR パッケージを追加し、2 番目から最後までの文を変更Go
  • 「代表的なアプリケーション回路」図の固定電圧バージョンを削除Go
  • Added RGR package to Pin Configuration and Functions section Go
  • Changed FB/SNS to FB in both pin out drawings, deleted TPS744xx from VQFN package Go
  • Changed Surface Mount to Top View in KTW pin out drawingGo
  • Changed input capacitor to bias capacitor in BIAS pin description Go
  • Deleted (adjustable version only) from description of FB pin in Pin Functions table Go
  • Changed I/O column value to — from O for NC pins of Pin Functions table Go
  • Deleted SNS pin from Pin Functions table Go
  • Added RGR package to Thermal Information table Go
  • Deleted "adjustable" from footnote 1 and deleted "ISNS" from footnote 4 of Electrical Characteristics tableGo
  • Deleted (adjustable version) from VREF parameter name in Electrical Characteristics table Go
  • Deleted SNS pin reference from IFB,ISNS parameter: Changed symbol from IFB, ISNS to IFB, deleted sense from parameter nameGo
  • Changed conditions of R1, R2 in Noise Spectral Density figureGo
  • Deleted Fixed Voltage Versions figure from Functional Block Diagram sectionGo
  • Changed first paragraph of Application Information section: deleted and tracking capabilities from first sentence and changed very low input and output voltages to very low output voltages with low VIN to VOUT headroom in last sentenceGo
  • Changed title of first typical application from Adjustable Voltage Part and Setting to Setting the TPS74401 Go
  • Deleted reference to adjustable version in first sentence and Typical Application Circuit for the TPS74401 figure in first typical application sectionGo
  • Changed Because VIN ≥ VOUT + 1.62V to Because VIN is less than VOUT plus the VBIAS dropout and VBIAS = VIN to VBIAS = VOUT in last paragraph of Detailed Design Procedure in first typical application sectionGo
  • Deleted Fixed Voltage and Sense Pin sectionGo
  • Deleted BIAS recommendation from Layout Guidelines sectionGo
  • Added RGR package to VQFN description in Power Dissipation sectionGo
  • Added RGR package to Thermal Considerations section Go
  • Changed RGW Package to VQFN Packages in caption of Layout Schematic figureGo