SBOA550 October   2022 OPA1671 , OPA2990 , SN74HCS04 , SN74HCS164 , SN74HCS30 , SN74LVC1G00 , SN74LVC1G123 , TLC04 , TLC14 , TS5A9411

 

  1.   Abstract
  2.   Trademarks
  3. Introduction
  4. The Davies Generator
  5. Optimizing Standard Resistance Values for THD Performance
  6. Simulation Examples
  7. Compensating for Shift Register Output Resistance
  8. Voltage-Mode Thevenin Equivalent
  9. Harmonic Filtering
  10. Tracking Harmonic Filter
  11. Multiphase Output
  12. 10Conclusion
  13. 11Acknowledgment
  14. 12References
  15.   A Analytical Solution for Resistance Network Values
  16.   B Forbidden States of the Johnson Counter

The Davies Generator

Figure 2-1 shows a simplified configuration of a 6-bit Johnson counter and related resistors to form a stepped-sinusoid output. Careful selection of the resistor values maps each state of the Johnson counter onto a point of the cosine function. As the Johnson counter is clocked through the states, a stepped sinusoid appears at the amplifier output. Extending the length of the shift register or using additional harmonic filtering (not shown) improves harmonic distortion performance.

Output harmonic filter not shown.
Figure 2-1 A 6-bit Johnson Counter and Resistors Form a Davies Sinusoidal Generator

A Johnson counter is a type of ring counter commonly used for state machines or clock division and must be properly reset at power up. Using a common clock, for each clock pulse the bit pattern shifts right with the output of the rightmost flip-flop inverted (or the output used if available) and fed back to the input of the shift register. This counter can be clocked relatively fast since the only propagation delay involved is from CLK to Q or Q, whichever is slower.

Table 2-1 shows the repeating bit pattern of a 6-bit Johnson counter as the counter evolves over 12 clock cycles starting from a reset state. Twelve clock pulses sequence a 6-bit counter through all desired states.

Table 2-1 Bit Pattern of a 6-bit Johnson Counter While Clocked Through States
CLK Q0 Q1 Q2 Q3 Q4 Q5
Reset 0 0 0 0 0 0
1 0 0 0 0 0
1 1 0 0 0 0
1 1 1 0 0 0
1 1 1 1 0 0
1 1 1 1 1 0
1 1 1 1 1 1
0 1 1 1 1 1
0 0 1 1 1 1
0 0 0 1 1 1
0 0 0 0 1 1
0 0 0 0 0 1
0 0 0 0 0 0

A counter of length N completes a full count cycle every 2 × N clock edges so the sinusoidal output frequency is determined with Equation 1.

Equation 1. F o u t =   F C L K 2 N

This counter only uses a fraction of the possible states available from the flip-flops. See Appendix B for important details regarding unused flip-flop states and how to avoid them.

Referring back to Figure 2-1, each resistor contributes a weighted current into the virtual ground node at the op amp, summing to I I I . Note how the resistor values are used in pairs (for an even length register). For symmetry reasons, assume the outputs of the flip-flops are represented by ±1-V logic levels (rather than binary 1 or 0) so each pair of Ri resistors contributes + 2   V R i , - 2   V R i , or 0 current toward I depending on the state of the counter. For a counter of even length, the ideal normalized resistor values are computed as Equation 2.

Equation 2. R i = 1   s i n π 2 N × 1 s i n π 2 N 2 i + 1   f o r   0 i N 2 - 1

For an odd length register (use Equation 3).

Equation 3. R i = 1   s i n π 2 N × 1 s i n π 2 N 2 i + 1   f o r   0 i N - 1 2 - 1

The middle resistor is shown in Equation 4.

Equation 4. R N - 1 2 = 1   c o s π   N - 1 2 N

See Appendix A for derivations of Equation 2 through Equation 4. Table 2-2 summarizes these values for registers up to length 16. Given the standard MSI devices available, of particular interest are register lengths 4, 6, 8, and 16. Any even-length register can also produce quadrature output. For applications requiring three-phase output, register lengths 6, 9, and 12 are useful. Registers of lengths 6 and 12 can produce both three-phase and quadrature output. Notice the parallel combination of all resistors in a given array is 1 Ω.

Table 2-2 Normalized Resistor Array Values for a Davies Generator Having Various Shift Register Lengths
Length Ideal R i = 1 G i , Normalized to 1 Ω
N R0 R1 R2 R3 R4 R5 R6 R7
1 1.000
2 2.000
3 4.000 2.000
4 6.828 2.828
5 10.472 4.000 3.236
6 14.928 5.464 4.000
7 20.196 7.208 4.988 4.494
8 26.274 9.226 6.165 5.226
9 33.163 11.518 7.518 6.128 5.759
10 40.863 14.081 9.040 7.174 6.472
11 49.374 16.915 10.730 8.353 7.323 7.027
12 58.695 20.020 12.585 9.657 8.293 7.727
13 68.827 23.396 14.604 11.084 9.369 8.545 8.296
14 79.770 27.042 16.787 12.631 10.548 9.462 8.988
15 91.523 30.959 19.134 14.297 11.825 10.472 9.780 9.567
16 104.087 35.146 21.643 16.082 13.198 11.568 10.661 10.252