3 Optimizing Standard Resistance Values for THD Performance

The ideal resistances of Table 2-2 usually cannot be implemented directly with standard EIA-series values. Any deviation from an ideal value results in a systematic output error that deteriorates THD performance. This is similar to THD degradation when using a DAC having imperfect integral non-linearity (INL) characteristics. The values in Table 2-2 show that the resistors in the center of the shift register, having the smallest values, contribute the most current and the output is most sensitive to errors in these values.

Resistance error consists of systematic and random components. Systematic error is created foremost by selecting a non-ideal value and secondarily by the non-zero output resistance of the flip-flops. Random error is primarily due to variation related to tolerance, but recall all resistors in even-length registers and most in odd-length registers are used in pairs. This is fortunate because resistors are commonly fabricated in the same lot and taken from the same reel during manufacturing to be well-correlated (though this is not always the case) and can result in better-than-expected current cancellation at the output node. For this reason, if a resistor needs replacement always replace both the resistor and the mate of the resistor with well-matched parts.

Since the middle-most resistor pair ($R_{\frac{N}{2}-1}$ for even-length registers) carries the heaviest weight, choose this value first to coincide with a standard value by scaling the overall output Thevenin resistance slightly. The remaining resistors are calculated using this revised value working from the middle outward following an algorithm to minimize accumulated error.

For example, suppose an 8-bit shift register is used and a Thevenin output resistance of about 600 Ω is desired. From Table 2-1, the ideal middle resistor pair value is 5.226 × 600 Ω ≈ 3136 Ω. The nearest EIA-E96 (1%) value is 3.16 kΩ. By scaling the overall Thevenin resistance to 604.6 Ω, the systematic error contribution of these middle resistors is eliminated with < 1% system-level impact.

This revised Thevenin value is now used to calculate the remaining values using the following over-under (or under-over) algorithm to minimize accumulating errors. Continuing the example working outward from the middle, the next pair value is 6.165 × 604.6 Ω ≈ 3727 Ω. The nearest E96 value is 3.74 kΩ (+0.35%). Since this value is over the ideal value, the next resistor is chosen under the ideal to compensate. Moving outward again, the next resistor value is 9.226 × 604.6 Ω ≈ 5578 Ω. The nearest E96 value that is under (since the previous was over) is 5.49 kΩ (–1.58%). The outermost pair is then 26.274 × 604.6 Ω ≈ 15.885 kΩ, and the nearest E96 value that is over is 16.2 kΩ (+1.98%). The final Thevenin output resistance using these E96 values is ≈ 604.1 Ω; within 1% of the original design goal and improves linearity as best possible throughout the states of the counter using standard values.

This over-under selection of values skews the harmonic content contributed by resistor selection away from lower-order harmonics and toward higher orders that are easier to eliminate with filtering. Figure 3-1 shows how this algorithm helps maintain linearity through the various states of the Johnson counter as compared to an ideal DAC line.

The prior example ignores flip-flop output resistance effects, but an enhanced example that compensates for this is found in Section 4.