SLAAE22A June   2021  – April 2024 DAC43204 , DAC53001 , DAC53002 , DAC53202 , DAC53204 , DAC53204W , DAC63001 , DAC63002 , DAC63202 , DAC63204 , TPS7A57 , TPS7A94

 

  1.   1
  2.   Design Objective
  3.   Design Description
  4.   Design Notes
  5.   Design Simulations
    1.     Transient Simulation Results
  6.   Register Settings
  7.   Pseudo Code Example
  8.   Design Featured Devices
  9.   Design References

Pseudo Code Example

The following shows a pseudo code sequence to program the initial register values to the NVM of the DAC53204. The values given here are for the design choices made in the Design Notes.

Pseudo Code Example

//SYNTAX: WRITE <REGISTER NAME (Hex code)>, <MSB DATA>, <LSB DATA>  
//Power-up voltage output on all channels, enables internal reference
WRITE COMMON-CONFIG(0x1F), 0x12, 0x49 
//Configure GPI for Margin-High, Low function
WRITE GPIO-CONFIG(0x24), 0x01, 0xF5 
//Write DAC margin high code (repeat for all channels)
WRITE DAC-0-MARGIN-HIGH(0x01), 0xA6, 0x80
//Write DAC margin low code (repeat for all channels)
WRITE DAC-0-MARGIN-LOW(0x02), 0x02, 0xC0
//Save settings to NVM
WRITE COMMON-TRIGGER(0x20), 0x00, 0x02