SLUA560D June   2011  – March 2022 UCC28950 , UCC28950-Q1 , UCC28951 , UCC28951-Q1

 

  1.   Trademarks
  2. 1 Design Specifications
  3. 2 Functional Schematic
  4. 3 Power Budget
  5. 4 Transformer Calculations (T1)
  6. 5 QA, QB, QC, QD FET Selection
  7. 6 Selecting LS
  8. 7 Output Inductor Selection (LOUT)
  9. 8 Output Capacitance (COUT)
  10. 9 Select FETs QE and QF
  11. 10Input Capacitance (CIN)
  12. 11Setting Up the Current Sense (CS) Network (CT, RS, RRE, DA)
  13. 12Voltage Loop and Slope Compensation
  14. 13Setting Turn-on Delays to Achieve Zero Voltage Switching (ZVS)
  15. 14Turning SR FETs-off Under Light Load Conditions
  16. 15600 W FSFB Detailed Schematic and Test Data
  17. 16References
  18. 17Revision History

14 Turning SR FETs-off Under Light Load Conditions

To increase efficiency at lighter loads the UCC28950/1programmed (Pin 12, DCM) under light load conditions to turn off the synchronous FETs on the secondary side of the converter (QE and QF). This threshold is programmed with resistor divider formed by RE and RG. This DCM threshold needs to be set at a level before the inductor current goes discontinues. The following equation sets the synchronous rectifiers to turnoff at roughly 15% load current.

Equation 151. VRS=POUT×0.15VOUT+ΔILOUT2×RSa1×a2=0.29V
Equation 152. RG=1 kΩ

Select a standard resistor value for RG.

Equation 153. RE=RGVREF-VRSVRS≈16.3 kΩ

Select a standard resistor value for this design

Equation 154. RE=16.9k