SLUA560D June   2011  – March 2022 UCC28950 , UCC28950-Q1 , UCC28951 , UCC28951-Q1

 

  1.   Trademarks
  2. 1 Design Specifications
  3. 2 Functional Schematic
  4. 3 Power Budget
  5. 4 Transformer Calculations (T1)
  6. 5 QA, QB, QC, QD FET Selection
  7. 6 Selecting LS
  8. 7 Output Inductor Selection (LOUT)
  9. 8 Output Capacitance (COUT)
  10. 9 Select FETs QE and QF
  11. 10Input Capacitance (CIN)
  12. 11Setting Up the Current Sense (CS) Network (CT, RS, RRE, DA)
  13. 12Voltage Loop and Slope Compensation
  14. 13Setting Turn-on Delays to Achieve Zero Voltage Switching (ZVS)
  15. 14Turning SR FETs-off Under Light Load Conditions
  16. 15600 W FSFB Detailed Schematic and Test Data
  17. 16References
  18. 17Revision History

10 Input Capacitance (CIN)

This design was being fed by a PFC pre-regulator and the input capacitor (CIN) will need to be selected based on holdup requirements; as well as, ripple current and voltage requirements.

Note:

The delay time needed to achieve ZVS can act as a duty cycle clamp (DCLAMP).

Calculate tank frequency:

Equation 73. f R = 1 2 π L S × ( 2 × C O S S _ ⁡ Q A _ ⁡ A V G )

Estimated delay time:

Equation 74. t D E L A Y = 2 f R × 4 ≈ 314 n s

Effective duty cycle clamp (DCLAMP):

Equation 75. D C L A M P = 1 f s - t D E L A Y × f s = 94   %

VDROP is the minimum input voltage where the converter can still maintain output regulation. The converter’s input voltage would only drop down this low during a brownout or line-drop condition if this converter was following a PFC pre-regulator.

Equation 76. V D R O P = 2 × D C L A M P × V R D S O N + a 1 × ( V O U T + V R D S O N ) D C L A M P = 276.2   V

CIN was calculated based on one line cycle of holdup:

Equation 77. C I N ≥ 2 × P O U T × 1 60 H z V I N 2 - V D R O P 2 ≈ 364   u F

Calculate high frequency input capacitor RMS current (ICINRMS).

Equation 78. I C I N R M S = I P R M S 1 2 - P O U T V I N M I N × a 1 2 = 1.8   A

To meet the input capacitance and RMS current requirements for this design we chose a 330-µF capacitor from Panasonic part number EETHC2W331EA.

Equation 79. C I N = 330   u F

This capacitor had a high frequency (ESRCIN) of 150 mΩ this was measured with an impedance analyzer at both 120 and 200 kHz.

Equation 80. E S R C I N = 0.150   Ω

Estimate CIN power dissipation (PCIN):

Equation 81. P C I N = I C I N R M S 2 × E S R C I N = 0.5   W

Recalculate remaining power budget:

Equation 82. P B U D G E T = P B U D G E T - P C I N ≈ 6.0   W

There is roughly 6.0 W left in the power budget left for the current sensing network, and biasing the control device and all resistors supporting the control device.