SLVAF45 August 2021 TPS51397A , TPS566231 , TPS566235 , TPS566238 , TPS568230
D-CAP series control schemes are widely used in notebook, server, EP power and many other areas due to the advantages of good dynamic performance and less external components [1-2]. The zero formed by output capacitor ESR is used for loop compensation in the original D-CAP control [3- 4]. For some application with small ESR output capacitor, the zero generated by the internal ripple injection circuit can be used for compensation instead of the ESR zero in D-CAP2/D-CAP3 control. In the previous application report https://www.ti.com/lit/pdf/SLVAF11, it is introduced that a simplified method for D-CAP2/D-CAP3 converter stability design is to ensure the ripple injection zero inside bandwidth [5]. On the basis, the output capacitor selection limits are deducted for application design. However, the bandwidth will decrease with increasing output voltage in D-CAP control loop and the ripple injection zero is hard to be kept inside bandwidth. In this condition, the feedforward capacitor, that can provide an additional pair of zero and pole in the loop, can be used to ensure system stability. The detailed analysis and selection method of feedforward capacitor Cff are introduced in this application report.