SPRACR3A april   2020  – may 2023 F29H850TU , F29H859TU-Q1 , TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F28075 , TMS320F28075-Q1 , TMS320F28076 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379D-Q1 , TMS320F28379S , TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1

 

  1.   CRC Engines in C2000 Devices
  2.   Trademarks
  3. 1 Introduction
    1. 1.1 Acronyms
  4. 2 BGCRC
  5. 3 GCRC
  6. 4 VCU CRC
  7. 5 ERAD CRC
  8. 6 CLA CRC (PSA)
    1. 6.1 CLA PSA
      1. 6.1.1 PSA for PAB
      2. 6.1.2 PSA for DWDB
      3. 6.1.3 Considerations While Computing the PSA
  9. 7 CLA-PROMCRC – CLA Program Integrity check
  10. 8 CRC Calculation Using Software
  11. 9 CRC Recommendation for Use-Cases
  12. 10CRC Modules Comparison
  13. 11CRC Engines vs Devices Mapping Table
  14. 12References
  15. 13Revision History

6.1.3 Considerations While Computing the PSA

  • It is recommended to compute the PSA in event mode (MPSACTL.MPABCYC = 1 and MPSACTL.MDWDBCYC = 1). Computing PSA in cycle mode has strong dependency on memory access which might be difficult to ensure during a real application.
  • Polynomial configuration should be performed when PSA2 is stopped.