SPRACR3A april   2020  – may 2023 F29H850TU , F29H859TU-Q1 , TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F28075 , TMS320F28075-Q1 , TMS320F28076 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379D-Q1 , TMS320F28379S , TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1

 

  1.   CRC Engines in C2000 Devices
  2.   Trademarks
  3. 1 Introduction
    1. 1.1 Acronyms
  4. 2 BGCRC
  5. 3 GCRC
  6. 4 VCU CRC
  7. 5 ERAD CRC
  8. 6 CLA CRC (PSA)
    1. 6.1 CLA PSA
      1. 6.1.1 PSA for PAB
      2. 6.1.2 PSA for DWDB
      3. 6.1.3 Considerations While Computing the PSA
  9. 7 CLA-PROMCRC – CLA Program Integrity check
  10. 8 CRC Calculation Using Software
  11. 9 CRC Recommendation for Use-Cases
  12. 10CRC Modules Comparison
  13. 11CRC Engines vs Devices Mapping Table
  14. 12References
  15. 13Revision History

2 BGCRC

Back-Ground Cyclic Redundancy Check (BGCRC) engine can be used to calculate CRC on a memory region without needing to use the CPU or the CLA. The CRC computation can be then used for detecting memory corruption. BGCRC needs just one-time configuration for its functionality. BGCRC after computing the CRC, compares against the configured golden value and can then trigger a NMI or CLA task if there is any error.

The BGCRC module has the ability to continuously read data from the memory as a background process and work in the background right through the application run-time. The reads happen during the idle time (when none of the other masters such as CPU, CLA, DMA are accessing the memory block) and hence the functional accesses are not impacted. The module also does ECC/parity check while reading the memories. Any ECC or parity errors that occur during the read will be indicated by setting the respective NMI flag and generating an interrupt, if configured.

The module also provides an option to lock and commit the register values once configured. The CRC computation time can also be monitored using an internal watchdog. The engine takes one cycle for computing the CRC per 32-bit word. But, the total time taken for a memory block may vary based on CPU/DMA/CLA memory accesses to the configured memory block as BGCRC works only during idle time.

The device has separate BGCRC instances for CPU and CLA in both CPU1 and CPU2 subsystems.

For more details on computation time and other features present in the module, see the TMS320F2838x Microcontrollers Technical Reference Manual.

For software support, see C2000ware:

  • driverlib can be referred from <C2000Ware installation folder>\driverlib\<device>\driverlib
  • examples can be referred from <C2000Ware installation folder>\driverlib\<device>\examples\c28x\bgcrc