For each channel to be compensated for gain error arising from the VREFLO sampling method, a calibration coefficient needs to be determined. There are two potential methods to determine these coefficients :

• Determine the coefficient via simulation

  Coefficients can be determined via input settling simulation similar to that performed in Figure 5-2. Once the settling error is determined, the coefficient can be calculated using the formula

• Equation 8. $C_i= V_{in} / (V_{in}-settling error)$
• Determine the coefficient via in-system calibration

Instead of measuring the input and output voltages in simulation, the settling induced gain error can be directly measured in the end application. A known DC voltage is applied to the channel and then sampled through the ADC. Any deviation from the expected value is assumed to be memory cross-talk induced settling error. Calculation of the coefficient proceeds using Equation 9.

In cases where system gain calibration was already planned for the end application, compensation for the gain error caused by the VREFLO sampling method can be absorbed into the existing calibration scheme (only one coefficient is needed).