SPRACZ0A August   2021  – March 2023 F29H850TU , F29H850TU , F29H859TU-Q1 , F29H859TU-Q1 , TMS320F2800132 , TMS320F2800132 , TMS320F2800133 , TMS320F2800133 , TMS320F2800135 , TMS320F2800135 , TMS320F2800137 , TMS320F2800137 , TMS320F2800152-Q1 , TMS320F2800152-Q1 , TMS320F2800153-Q1 , TMS320F2800153-Q1 , TMS320F2800154-Q1 , TMS320F2800154-Q1 , TMS320F2800155 , TMS320F2800155 , TMS320F2800155-Q1 , TMS320F2800155-Q1 , TMS320F2800156-Q1 , TMS320F2800156-Q1 , TMS320F2800157 , TMS320F2800157 , TMS320F2800157-Q1 , TMS320F2800157-Q1 , TMS320F280021 , TMS320F280021 , TMS320F280021-Q1 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280023C , TMS320F280025 , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280025C-Q1 , TMS320F280033 , TMS320F280033 , TMS320F280034 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C , TMS320F280039C-Q1 , TMS320F280039C-Q1 , TMS320F280040-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C , TMS320F280049C-Q1 , TMS320F280049C-Q1 , TMS320F28075 , TMS320F28075 , TMS320F28075-Q1 , TMS320F28075-Q1 , TMS320F28076 , TMS320F28076 , TMS320F28374D , TMS320F28374D , TMS320F28374S , TMS320F28374S , TMS320F28375D , TMS320F28375D , TMS320F28375S , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376D , TMS320F28376S , TMS320F28376S , TMS320F28377D , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28377S-Q1 , TMS320F28378D , TMS320F28378D , TMS320F28378S , TMS320F28378S , TMS320F28379D , TMS320F28379D , TMS320F28379D-Q1 , TMS320F28379D-Q1 , TMS320F28379S , TMS320F28379S , TMS320F28384D , TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28388D , TMS320F28388S , TMS320F28388S , TMS320F28P550SJ , TMS320F28P550SJ , TMS320F28P559SJ-Q1 , TMS320F28P559SJ-Q1 , TMS320F28P650DH , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1 , TMS320F28P659SH-Q1

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Resources
      1. 1.1.1 TINA-TI SPICE-Based Analog Simulation Program
      2. 1.1.2 PSPICE for TI Design and Simulation Tool
      3. 1.1.3 Application Report: ADC Input Circuit Evaluation for C2000 MCUs
      4. 1.1.4 TI Precision Labs - SAR ADC Input Driver Design Series
      5. 1.1.5 Analog Engineer's Calculator
      6. 1.1.6 TI Precision Labs - Op Amps: Stability Series
      7. 1.1.7 Related Application Reports
      8. 1.1.8 Comparison of Schematic Capture and Simulation Tools
      9. 1.1.9 PSpice for TI ADC Input Models
  4. 2Charge-Sharing Concept
    1. 2.1 Traditional High-Speed ADC Driving Circuits
    2. 2.2 Increased Cs in High-Speed ADC Driving Circuits
    3. 2.3 Very Large Cs in ADC Driving Circuits
    4. 2.4 Charge-Sharing Operation
    5. 2.5 Sample Rate and Source Impedance vs. Tracking Error
    6. 2.6 Analytical Solution to Tracking Error
    7. 2.7 Charge-Sharing in Multiplexed ADCs
    8. 2.8 Charge-Sharing Circuit Advantages
    9. 2.9 Charge-Sharing Circuit Disadvantages
  5. 3Charge Sharing Design Flow
    1. 3.1 Gather Required Information
    2. 3.2 Size Cs
    3. 3.3 Verify Sample Rate, Source Impedance, and Bandwidth
    4. 3.4 Simulate Circuit Settling Performance
    5. 3.5 Input Design Worksheet
  6. 4Charge-Sharing Circuit Simulation Methods
    1. 4.1 Simulation Components
      1. 4.1.1 Vin
      2. 4.1.2 Voa , Voa_SS, and Verror
      3. 4.1.3 Rs, Cs, and Vcont
      4. 4.1.4 Ch, Ron, and Cp
      5. 4.1.5 S+H Switch, Discharge Switch, tacq, and tdis
    2. 4.2 Configure the Simulation Parameters
    3. 4.3 Bias Point Analysis to Determine Voa_ss
    4. 4.4 Transient Analysis to Determine Voa_ss
    5. 4.5 Measure the Settling Error
    6. 4.6 Sweeping Source Resistance
  7. 5Example Circuit Designs
    1. 5.1 Example 1: Determining Maximum Sample Rate
      1. 5.1.1 Example 1: Analysis
      2. 5.1.2 Example 1: Simulation
      3. 5.1.3 Example 1: Worksheet
    2. 5.2 Example 2: Adding an Op-amp
      1. 5.2.1 Example 2: Analysis
      2. 5.2.2 Example 2: Simulation
      3. 5.2.3 Example 2: Worksheet
    3. 5.3 Example 3: Reduced Settling Target
      1. 5.3.1 Example 3: Analysis
      2. 5.3.2 Example 3: Simulation
      3. 5.3.3 Example 3: Worksheet
    4. 5.4 Example 4: Voltage Divider
      1. 5.4.1 Example 4: Analysis
      2. 5.4.2 Example 4: Simulation
      3. 5.4.3 Example 4: Worksheet
  8. 6Summary
  9.   A Appendix: ADC Input Settling Motivation
    1.     A.1 Mechanism of ADC Input Settling
    2.     A.2 Symptoms of Inadequate Settling
      1.      A.2.1 Distortion
      2.      A.2.2 Memory Cross-Talk
      3.      A.2.3 Accuracy
      4.      A.2.4 C2000 ADC Architecture
  10.   References
  11.   Revision History

5.4.2 Example 4: Simulation

The first step for simulating the ADC driver behavior is to determine the DC voltage at the output of the voltage divider assuming a 400 V input. This can done using the same method as the op-amp steady state voltage output: a bias point analysis. The annotated circuit following this analysis is shown in Figure 5-13. It can be seen that the voltage divider output is 2.977667 V. This value is copied to Voa_ss so that the value of Verror correctly reflects only the settling error. Finally, a transient analysis whose simulation profile is shown in Figure 5-14 is run from 1 ms to 2 ms. The results can be seen in Figure 5-15. The final settling error is 2.977667 V - 2.976219 V = 1.45 mV

GUID-11A4DF95-FC2E-4599-8944-BBE01485D837-low.jpg Figure 5-13 Example 4: Simulation Circuit
GUID-881402FD-7668-4B20-BD59-18840B96F36F-low.jpg Figure 5-14 Example 4: Simulation Profile
GUID-4634D628-F9CF-4119-B39B-D8F6DBE3F38B-low.jpg Figure 5-15 Example 4: Simulation Results