For this use-case, all three ePWM modules are set up for active high complementary signals. Meaning ePWMxA remains as is with a rising edge delay (RED) and ePWMB has the same source signal as ePWMA, but it is inverted with a falling edge delay (FED) instead of a rising edge delay. #FIG_EBV_FCV_4TB illustrates these two signals.

In order to set up these signal pairs, utilize the deadband submodule as it allows you to apply this scheme of outputs along with many other signal pairs.

To begin, take a look at the deadband submodule, which is essentially a set of switches that work together to achieve the desired output. S4 and S5 decide what the source signal is for the rest of the submodules: ePWMA or ePWMB. Since you want the same source signal for both resulting ePWMA and ePWMB outputs, set both switches to the ePWMA input. Next is S8, which is responsible for deciding which of the outputs will have RED and FED or both applied to it. Only one channel, either A or B, can have both RED and FED.

For this case, ePWMA will have RED and ePWMB will have FED so the switch is set to the zero position. Since ePWMB is inverted, S3 is in the 1 position, while S2 remains in the 0 position. The deadband module is being utilized, so S0 and S1 are both set to 1. The last step is deciding whether to swap the current outputs. For this use-case, leave S7 and S6 as-is, meaning the current setup is what is applied and not the swapped output versions.

#GUID-276A33C6-E402-4F9D-93A1-ED4D868F8241 shows this configuration within SysConfig. By pressing the ‘SETUP THE DEAD-BAND MODULE’ button next to the ‘Active High Complementary’ option, the SysConfig tool automatically sets up the module in the correct way to achieve active high complementary pairs.

In order to calculate the required dead-band rising edge delay (DBRED) and dead-band falling edge delay (DBFED), the below calculations are done:

Re-arrange the equation to find the value of DBRED, which is the value needed:

The period of the time-base clock is known from prior equations done in this application report:

// EPWM 1 (the code is the same for EPWM2 and EPWM3, except for the base address)
EPWM_setDeadBandDelayPolarity(myEPWM1_BASE, EPWM_DB_FED, EPWM_DB_POLARITY_ACTIVE_LOW); 
EPWM_setDeadBandDelayMode(myEPWM1_BASE, EPWM_DB_RED, true); 
EPWM_setRisingEdgeDelayCount(myEPWM1_BASE, 20); 
EPWM_setDeadBandDelayMode(myEPWM1_BASE, EPWM_DB_FED, true); 
EPWM_setFallingEdgeDelayCount(myEPWM1_BASE, 20);