SLAAE56A November 2022 – March 2023 MSPM0G1105 , MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G3105 , MSPM0G3106 , MSPM0G3107 , MSPM0G3505 , MSPM0G3506 , MSPM0G3507 , MSPM0L1105 , MSPM0L1106 , MSPM0L1303 , MSPM0L1304 , MSPM0L1304-Q1 , MSPM0L1305 , MSPM0L1305-Q1 , MSPM0L1306 , MSPM0L1306-Q1 , MSPM0L1343 , MSPM0L1344 , MSPM0L1345 , MSPM0L1346
The STM32G0x and MSPM0 both have internal references which can be used to supply a reference voltage to internal peripherals and output to external peripherals.
Feature | STM32G0 | MSPM0G | MSPM0L |
---|---|---|---|
Internal Reference (V) | 2.048, 2.5 | 1.4, 2.5 | 1.4, 2.5 |
External Reference (V) | When VDD < 2, VREF = VDD | External: 1.4 ≤ VREF ≤ VDD | External: 1.4 ≤ VREF ≤ VDD |
When VDD ≥ 2, 2 ≤ VREF ≤ VDD | |||
Output Internal Reference | Yes | Yes | Yes |
Internally Connect to ADC | Yes | Yes | Yes |
Internally Connect to DAC | Yes | Yes | No |
Internally Connect to COMP | No | Yes | No |
Internally Connect to OPA | N/A | Yes | No |
STM32G0x VREFBUF Bits | MSPM0 Equivalent |
---|---|
VREFBUF Bit3 (VRR) | CTL1 Bit0 (READY) |
VREFBUF Bit2 (VRS) | CTL0 Bit7 (BUFCONFIG) |
VREFBUF Bit1 (HIZ) | N/A |
VREFBUF Bit0 (ENVR) | CTL0 Bit0 (ENABLE) |
For sample and hold mode: CTL0 Bit8 (SHMODE) |
For the MSPM0 VREF, you must enable the power bit, PWREN Bit0 (ENABLE).
Code examples that use VREF can be found in the MSPM0 SDK examples guide.