SLAAE75A November   2022  – March 2023 MSPM0L1105 , MSPM0L1106 , MSPM0L1303 , MSPM0L1304 , MSPM0L1304-Q1 , MSPM0L1305 , MSPM0L1305-Q1 , MSPM0L1306 , MSPM0L1306-Q1 , MSPM0L1343 , MSPM0L1344 , MSPM0L1345 , MSPM0L1346

 

  1.   Abstract
  2.   Trademarks
  3. 1 MSPM0L Hardware Design Check List
  4. 2 Power Supplies in MSPM0L Devices
    1. 2.1 Digital Power Supply
    2. 2.2 Analog Power Supply
    3. 2.3 Built-in Power Supply and Voltage Reference
    4. 2.4 Recommended Decoupling Circuit for Power Supply
  5. 3 Reset and Power Supply Supervisor
    1. 3.1 Digital Power Supply
    2. 3.2 Power Supply Supervisor
  6. 4 Clock System
    1. 4.1 Internal Oscillators
    2. 4.2 External Clock Output (CLK_OUT)
    3. 4.3 Frequency Clock Counter (FCC)
  7. 5 Debugger
    1. 5.1 Debug Port Pins and Pinout
    2. 5.2 Debug Port Connection With Standard JTAG Connector
  8. 6 Key Analog Peripherals
    1. 6.1 ADC Design Considerations
    2. 6.2 OPA Design Considerations
    3. 6.3 DAC Design Considerations
    4. 6.4 COMP Design Considerations
    5. 6.5 GPAMP Design Considerations
  9. 7 Key Digital Peripherals
    1. 7.1 Timer Resources and Design Considerations
    2. 7.2 UART and LIN Resources and Design Considerations
    3. 7.3 I2C and SPI Design Considerations
  10. 8 GPIOs
    1. 8.1 GPIO Output Switching Speed and Load Capacitance
    2. 8.2 GPIO Current Sink and Source
    3. 8.3 High Speed GPIOs
    4. 8.4 Open-Drain GPIOs Enable 5-V Communication Without a Level Shifter
    5. 8.5 Communicate With 1.8-V Devices Without a Level Shifter
    6. 8.6 Unused Pins Connection
  11. 9 Layout Guides
    1. 9.1 Power Supply Layout
    2. 9.2 Considerations for Ground Layout
    3. 9.3 Traces, Vias, and Other PCB Components
    4. 9.4 How to Select Board Layers and Recommended Stack-up
  12. 10Bootloader
    1. 10.1 Bootloader Introduction
    2. 10.2 Bootloader Hardware Design Considerations
      1. 10.2.1 Physical Communication interfaces
      2. 10.2.2 Hardware Invocation
  13. 11References
  14. 12Revision History

5.2 Debug Port Connection With Standard JTAG Connector

#FIG_Z4Q_RGC_GVB shows the connection between MSPM0L family MCU SWD debug port with the standard JTAG connector.

GUID-CB14A221-9DC6-4AAB-BBA2-1D3C536D1A6B-low.png Figure 5-3 JTAG and MSPM0L Connection

For MSPM0L device, you can use XDS110 to implement debug/download function. Here list the contents of the XDS110 and provides instruction on installing the hardware.

Standard XDS110

You can purchase a standard XDS110 in ti.com. #FIG_V2Y_CHC_GVB shows a high-level diagram of the major functional areas and interfaces of the XDS110 probe.

GUID-5075F48E-8F8B-44A9-A405-DEFFA93A1034-low.png Figure 5-4 XDS110 Probe High-Level Block Diagram

More standard XDS110 information, see the XDS110 Debug Probe User's Guide.

Lite XDS110 (MSPM0 LaunchPad™ kit)

The MSPM0 LaunchPad kit include the XDS110-ET (Lite) circuit. You can also use this debugger to download your firmware into MSPM0 device. #FIG_NZV_3HC_GVB shows the XDS110-ET circuit.

There are two probes in XDS110-ET:

2.54-mm probe: This port supports the SWD protocol and includes a 5-V or 3.3-V power supply. You can connect SWDIO SWCLK 3V3 GND to the board and download firmware into the MSPM0L device.

This probe supports EnergyTrace™ technology so you can use this circuit to measure power consumption precisely in real time.

More information on EnergyTrace technology, visit the EnergyTrace Technology tool page.

GUID-56CAAEFE-F6DF-429E-B625-75CC8DAF9FB5-low.png Figure 5-5 XDS110-ET Circuit

10-pin probe: This port supports the JTAG and SWD protocols and include a 3.3-V power supply. You can use the 10-pin cable to connect the board and XDS110-ET and download firmware into the MSPM0L device. #FIG_FJ1_LHC_GVB show the 10-pin cable.

GUID-F2AAA788-4084-4ECE-9C4A-7D2779316DC8-low.png Figure 5-6 Arm Standard 10-Pin Cable
Note:
  • Standard XDS110 support level shift for debug ports, XDS110-ET just support 3.3v probe level.
  • TI does not recommend using the XDS110 to power other devices except the MSPM0L MCU. The XDS110 integrates an LDO with limited current drive capability.
  • XDS110-ET 2.54-mm probe does not support the JTAG protocol.
  • XDS110-ET 10-pin probe does not support EnergyTrace technology.