SLAU847D October 2022 – May 2024 MSPM0L1105 , MSPM0L1106 , MSPM0L1228 , MSPM0L1228-Q1 , MSPM0L1303 , MSPM0L1304 , MSPM0L1304-Q1 , MSPM0L1305 , MSPM0L1305-Q1 , MSPM0L1306 , MSPM0L1306-Q1 , MSPM0L1343 , MSPM0L1344 , MSPM0L1345 , MSPM0L1346 , MSPM0L2228 , MSPM0L2228-Q1
When the VBAT domain is supplied first on a completely unpowered device, the LFSS will start with the asynchronous sequence of the VBAT PMU.
The release of the VBAT POR will start the VBAT REF, VBAT BOR and VBAT LDO.
When the reset is de-asserted, the LFOSC starts and provides a 32kHz clock that operates the VBAT REF and BOR circuit in sampled mode. If this state is reached, the VBAT waits for further configuration by software. In this state, the overall power consumption of the LFSS is below the specified limit to enable 10-year lifetime from a coin cell battery.