SLLA602 March   2024 LM5110 , LM5111 , TPS2811 , TPS2811-Q1 , TPS2812 , TPS2813 , TPS2814 , TPS2815 , UCC27323 , UCC27324 , UCC27324-Q1 , UCC27325 , UCC27423 , UCC27423-EP , UCC27423-Q1 , UCC27424 , UCC27424-EP , UCC27424-Q1 , UCC27425 , UCC27425-Q1 , UCC27444 , UCC27444-Q1 , UCC27523 , UCC27524 , UCC27524A , UCC27524A-Q1 , UCC27524A1-Q1 , UCC27525 , UCC27526 , UCC27527 , UCC27528 , UCC27528-Q1 , UCC27624 , UCC27624-Q1 , UCC37323 , UCC37324 , UCC37325 , UCD7201

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2How a Gate Drive Transformer Works
  6. 3Benefits of a Gate Drive Transformer
  7. 4Design Considerations of a Gate Drive Transformer
    1. 4.1 Duty Cycle Limitation
    2. 4.2 Transients and Noise
    3. 4.3 Calculations
    4. 4.4 Power Loss Calculations
    5. 4.5 Bias Supply Thermal Calculation
  8. 5Summary
  9. 6References

2 How a Gate Drive Transformer Works

There are many ways to configure a gate drive transformer, but the most common is the push-pull type shown in Figure 2-1.

GUID-20240226-SS0I-8HGM-PQRG-9KNKKV0K7X72-low.svg Figure 2-1 Example Schematic of a Push-Pull Gate Drive Circuit Used to Drive a Half-Bridge

In this configuration, a dual-channel low-side driver is used with a pulse-transformer to drive a high-voltage half-bridge. In Figure 2-2, the internals of OUTA and OUTB are separated to show the functionality.

GUID-20240226-SS0I-WTHT-CSJL-7PHCWHZTKJ3P-low.svg Figure 2-2 Simplified Schematic Showing Current Flow Through the Driver Output Stage in a Push-Pull Topology

By toggling OUTA high and OUTB low, and vice versa, a square wave of ±V­DD is created across the primary side of the pulse transformer. Note the dot notation in Figure 2-1 ; when the voltage across the primary is positive, a corresponding positive voltage is created on the high-side branch, and a negative voltage is created on the low-side branch. When the voltage across the primary is negative, there is a positive voltage created on the low-side branch and a negative voltage on the high-side branch.

The secondary side toggles between ±V­DD (multiplied by the turns ratio). The negative voltage is an issue for two reasons. First, energy is wasted to pull the CGS capacitance below ground, so the power dissipation in the gate drive IC and transformer is higher than needed to turn off the switch. Second, this voltage can sometimes exceed the allowable voltage ratings of the switch. This negative bias can be useful in some cases, but in many applications, negative bias is not needed.

One circuit that addresses the negative voltage issue is the PNP turn-off circuit shown in Figure 2-1. The diodes (D1 and D2) allow forward conduction to charge VGS when VDD is high. When VDD is low, D1 and D2 block reverse conduction. After VDD falls, the PNP BJTs (Q1 and Q2) turn on and sink current to pull down VGS and turn off the FET. Because the PNP BJTs turn off when VDD falls to 0, but the gate only goes high when VDD goes high, this local-turn off implementation also supports the addition of dead-time.

GUID-20240226-SS0I-6XBQ-8MFJ-T05SQDT1WZN6-low.svg Figure 2-3 Schematic of a Push-Pull Gate Drive Circuit With Colored Labels for Primary Current, Primary Voltage, and HO and LO
GUID-20240226-SS0I-N3PG-PM7H-LXFNKPJBGFHC-low.svg Figure 2-4 Corresponding Oscilloscope Capture to the Waveforms

The voltage across the primary toggles from ±12V, with some added dead time where both OUTA and OUTB are off. Current is transferred from primary to secondary to turn on both the high-side and low-side FET. Due to the local turn-off circuit, there is very little current transfer through the transformer during turn-off. The local turn-off circuit also allows for separate tuning of turn-on and turn-off times. In this example, the rise time was around 580ns and the fall time was around 200ns. Tunable rise and fall times enable greater slew-rate control and EMI reduction. Changing Rg allows tuning of the turn-on time, and changing RB allows tuning of the turn-off time.

Overall, the circuit shown in Figure 2-1 allows for the control of a high-voltage half-bridge using only a low-side gate driver IC, a transformer, and some extra components. There is no need for level-shifting, isolator ICs, or a bias supply as the gate drive transformer fulfills all of those roles at once.