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UCC27524A-Q1

ACTIVE

Automotive 5-A/5-A dual-channel gate driver with 5-V UVLO and negative input voltage handling

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Data sheet

UCC27524A-Q1

ACTIVE
Data sheet Order now

Product details

Number of channels 2 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 5 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Enable pin Operating temperature range (°C) -40 to 140 Rise time (ns) 7 Fall time (ns) 6 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Dual, Non-Inverting Input negative voltage (V) -5 Rating Automotive Undervoltage lockout (typ) (V) 4 Driver configuration Dual, Non-Inverting
Number of channels 2 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 5 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Enable pin Operating temperature range (°C) -40 to 140 Rise time (ns) 7 Fall time (ns) 6 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Dual, Non-Inverting Input negative voltage (V) -5 Rating Automotive Undervoltage lockout (typ) (V) 4 Driver configuration Dual, Non-Inverting
HVSSOP (DGN) 8 14.7 mm² 3 x 4.9 SOIC (D) 8 29.4 mm² 4.9 x 6
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results
    • Device temperature grade 1
  • Industry-standard pin out
  • Two independent gate-drive channels
  • 5A peak source and sink-drive current
  • Independent enable function for each output
  • TTL and CMOS-compatible logic threshold independent of supply voltage
  • Hysteretic-logic thresholds for high-noise immunity
  • Ability to handle negative voltages (–5V) at inputs
  • Inputs and enable pin-voltage levels not restricted by VDD pin bias supply voltage
  • 4.5V to 18V single-supply range
  • Outputs held low during VDD-UVLO, (ensures glitch-free operation at power-up and power-down)
  • Fast propagation delays (17ns typical)
  • Fast rise and fall times (6ns and 10ns typical)
  • 1ns typical delay matching between 2-channels
  • Ability to parallel two outputs for high-drive current
  • Outputs held in low when inputs are floating
  • SOIC-8 and VSSOP-8 PowerPad™ package options
  • Operating temperature range of –40°C to 150°C
  • Qualified for automotive applications
  • AEC-Q100 qualified with the following results
    • Device temperature grade 1
  • Industry-standard pin out
  • Two independent gate-drive channels
  • 5A peak source and sink-drive current
  • Independent enable function for each output
  • TTL and CMOS-compatible logic threshold independent of supply voltage
  • Hysteretic-logic thresholds for high-noise immunity
  • Ability to handle negative voltages (–5V) at inputs
  • Inputs and enable pin-voltage levels not restricted by VDD pin bias supply voltage
  • 4.5V to 18V single-supply range
  • Outputs held low during VDD-UVLO, (ensures glitch-free operation at power-up and power-down)
  • Fast propagation delays (17ns typical)
  • Fast rise and fall times (6ns and 10ns typical)
  • 1ns typical delay matching between 2-channels
  • Ability to parallel two outputs for high-drive current
  • Outputs held in low when inputs are floating
  • SOIC-8 and VSSOP-8 PowerPad™ package options
  • Operating temperature range of –40°C to 150°C

The UCC27524A-Q1 device is a dual-channel, high-speed, low-side, gate-driver device capable of effectively driving MOSFET and IGBT power switches. The UCC27524A-Q1 device is a variant of the UCC2752x family. The UCC27524A-Q1 device adds the ability to handle –5V directly at the input pins for increased robustness. The UCC27524A-Q1 device is a dual, non-inverting driver. Using a design that inherently minimizes shoot-through current, the UCC27524A-Q1 device is capable of delivering high-peak current pulses of up to 5A source and 5A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay (typically 17ns). In addition, the drivers feature matched, internal-propagation delays between the two channels which are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. This also enables connecting two channels in parallel to effectively increase current-drive capability or driving two switches in parallel with a single input signal. The input pin thresholds are based on TTL and CMOS compatible low-voltage logic, which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

For protection purposes, internal pull-up and pull-down resistors on the input pins of the UCC27524A-Q1 device ensure that outputs are held LOW when input pins are in floating condition. The UCC27524A-Q1 device features enable pins (ENA and ENB) to have better control of the operation of the driver applications. The pins are internally pulled up to VDD for active-high logic and are left open for standard operation.

The UCC27524A-Q1 devices is available in SOIC-8 (D) and VSSOP-PowerPAD-8 with exposed pad (DGN) packages.

The UCC27524A-Q1 device is a dual-channel, high-speed, low-side, gate-driver device capable of effectively driving MOSFET and IGBT power switches. The UCC27524A-Q1 device is a variant of the UCC2752x family. The UCC27524A-Q1 device adds the ability to handle –5V directly at the input pins for increased robustness. The UCC27524A-Q1 device is a dual, non-inverting driver. Using a design that inherently minimizes shoot-through current, the UCC27524A-Q1 device is capable of delivering high-peak current pulses of up to 5A source and 5A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay (typically 17ns). In addition, the drivers feature matched, internal-propagation delays between the two channels which are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. This also enables connecting two channels in parallel to effectively increase current-drive capability or driving two switches in parallel with a single input signal. The input pin thresholds are based on TTL and CMOS compatible low-voltage logic, which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

For protection purposes, internal pull-up and pull-down resistors on the input pins of the UCC27524A-Q1 device ensure that outputs are held LOW when input pins are in floating condition. The UCC27524A-Q1 device features enable pins (ENA and ENB) to have better control of the operation of the driver applications. The pins are internally pulled up to VDD for active-high logic and are left open for standard operation.

The UCC27524A-Q1 devices is available in SOIC-8 (D) and VSSOP-PowerPAD-8 with exposed pad (DGN) packages.
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Technical documentation

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Type Title Date
* Data sheet UCC27524A-Q1 Dual 5A, High-Speed, Low-Side Gate Driver With Negative Input Voltage Capability datasheet (Rev. C) PDF | HTML 13 Jun 2024
Functional safety information UCC27524A-Q1 Functional Safety FIT Rate, FMD and Pin FMA (Rev. A) PDF | HTML 03 Sep 2024
Application note Why use a Gate Drive Transformer? PDF | HTML 04 Mar 2024
Application note Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs PDF | HTML 22 Jan 2024
Application note Static Magnet Power Supply Design for Magnetic Resonance Imaging Application PDF | HTML 22 Jan 2024
Application note Benefits of a Compact, Powerful, and Robust Low-Side Gate Driver PDF | HTML 10 Nov 2021
Application brief External Gate Resistor Selection Guide (Rev. A) 28 Feb 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28 Feb 2020
Application note Improving Efficiency of DC-DC Conversion through Layout 07 May 2019
Application brief How to overcome negative voltage transients on low-side gate drivers' inputs 18 Jan 2019
Application brief High-Side Cutoff Switches for High-Power Automotive Applications (Rev. A) 26 Nov 2018
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 29 Oct 2018
Application note PFC Design Choice for On Board Charger Designs 24 May 2018
White paper Driving the future of HEV/EV with high-voltage solutions (Rev. B) 16 May 2018
Application brief Reducing Switching Losses in On-Board Chargers for Electric Vehicles 27 Mar 2018
Application brief Low-Side Gate Drivers With UVLO Versus BJT Totem-Pole 16 Mar 2018
Technical article Are you on-board? Demystifying EV charging systems PDF | HTML 31 Jul 2017

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

UCC27423-4-5-Q1EVM — UCC2742xQ1 Dual 4-A High-Speed Low-Side MOSFET Drivers With Enable Evaluation Module (EVM)

The UCC2742xQ1 EVM is a high-speed dual MOSFET evaluation module that provides a test platform for a quick and easy startup of the UCC2742xQ1 driver. Powered by a single 4V to 15V external supply, and featuring a comprehensive set of test points and jumpers. All of the devices have separate input (...)
User guide: PDF
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Simulation model

UCC27524 PSpice Transient Model

SLUM243.ZIP (28 KB) - PSpice Model
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Simulation model

UCC27524 TINA-TI Transient Reference Design

SLUM257.TSC (89 KB) - TINA-TI Reference Design
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Simulation model

UCC27524 TINA-TI Transient Spice Model

SLUM256.ZIP (8 KB) - TINA-TI Spice Model
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Simulation model

UCC27524 Unencrypted PSpice Transient Model

SLUM510.ZIP (1 KB) - PSpice Model
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Calculation tool

SLURB22 — UCC2752X Schematic Review Template

Supported products & hardware

Supported products & hardware

Products
Low-side drivers
UCC27523 — 5-A/5-A dual-channel gate driver with 5-V UVLO, inverting inputs, and enable UCC27524 — 5-A/5-A dual-channel gate driver with 5-V UVLO, enable, and 1-ns delay Matching UCC27524A — 5-A/5-A dual-channel gate driver with 5-V UVLO, enable, and negative input voltage handling UCC27524A-Q1 — Automotive 5-A/5-A dual-channel gate driver with 5-V UVLO and negative input voltage handling UCC27524A1-Q1 — Automotive 5-A/5-A dual-channel gate driver with 5-V UVLO and negative input voltage handling UCC27525 — 5-A/5-A dual-channel gate driver with 5-V UVLO, enable, and inverting/non-inverting inputs UCC27526 — 5-A/5-A dual-channel gate driver with 5-V UVLO, enable, and dual TTL inputs UCC27527 — 5-A/5-A dual-channel gate driver with 5-V UVLO, enable, dual CMOS inputs UCC27528 — 5-A/5-A dual-channel gate driver with 5-V UVLO, CMOS inputs, and enable UCC27528-Q1 — Automotive 5-A/5-A dual-channel gate driver with 5-V UVLO and CMOS inputs
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Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Reference designs

TIDM-02009 — ASIL D safety concept-assessed high-speed traction, bi-directional DC/DC conversion reference design

This reference design demonstrates control of HEV/EV traction inverter and bi-directional DC-DC converter by a single TMS320F28388D real-time C2000™ MCU. The traction control uses a software-based resolver to digital converter (RDC) driving the motor to a high speed up to 20,000 RPM. The (...)
Design guide: PDF
Schematic: PDF
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HVSSOP (DGN) 8 Ultra Librarian
SOIC (D) 8 Ultra Librarian
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